HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 40

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 1 CPU
Type
Arithmetic
operations
Rev. 4.00 Feb 24, 2006 page 24 of 322
REJ09B0139-0400
Instruction
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
MULXS
DIVXU
DIVXS
Size *
B/W/L
B
B/W/L
L
B
B/W
B/W
B/W
B/W
1
Function
Rd
Performs addition or subtraction on data in two general
registers, or on immediate data and data in a general
register. (Immediate byte data cannot be subtracted
from byte data in a general register. Use the SUBX or
ADD instruction.)
Rd
Performs addition or subtraction with carry or borrow
on byte data in two general registers, or on immediate
data and data in a general register.
Rd
Increments or decrements a general register by 1 or 2.
(Byte operands can be incremented or decremented by
1 only.)
Rd
Adds or subtracts the value 1, 2, or 4 to or from data in
a 32-bit register.
Rd decimal adjust
Decimal-adjusts an addition or subtraction result in a
general register by referring to the CCR to produce 4-
bit BCD data.
Rd
Performs unsigned multiplication on data in two general
registers: either 8 bits
16 bits
Rd
Performs signed multiplication on data in two general
registers: either 8 bits
16 bits
Rd
Performs unsigned division on data in two general
registers: either 16 bits
8-bit remainder or 32 bits
and 16-bit remainder.
Rd
Performs signed division on data in two general
registers: either 16 bits
8-bit remainder or 32 bits
and 16-bit remainder.
Rs
Rs
1
1
Rs
Rs
Rs
Rs
Rd, Rd
Rd, Rd
32 bits.
32 bits.
C
Rd, Rd
Rd
Rd
Rd
Rd
Rd, Rd
2
2
Rd
#IMM
8 bits
8 bits
8 bits
8 bits
Rd
Rd, Rd
#IMM
16 bits
16 bits
Rd
16 bits or 16 bits
16 bits or 16 bits
8-bit quotient and
8-bit quotient and
C
4
16-bit quotient
16-bit quotient
Rd
Rd

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