M30878FJBGP#U5 Renesas Electronics America, M30878FJBGP#U5 Datasheet - Page 604
M30878FJBGP#U5
Manufacturer Part Number
M30878FJBGP#U5
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M30878FJBGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30878FJBGP#U5M30878FJBGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 580 of 587
28.16.8 Boot Mode
28.16.9 Writing Command and Data
28.16.10 Block Erase
28.16.11 Wait Mode
28.16.12 Stop Mode
28.16.13 Low-Power Consumption Mode and On-Chip Oscillator Low-Power
When starting up in boot mode, input pins may not be placed in high-impedance states until the internal supply
voltage stabilizes. Use the following procedure to power up in boot mode.
Write command codes and data to even addresses in the user ROM area.
If an erase operation in progress is aborted due to such as the NMI interrupt, hardware reset, or supply voltage
drop, the lock bit of the block which has been erased may become 0 (locked). To erase the same block again, set
the FMR02 bit in the FMR0 register to 1 (lock bit disabled) and then execute the block erase command.
To enter wait mode, set the FMR01 bit in the FMR0 register to 0 (CPU rewrite mode disabled) and then execute
the WAIT instruction.
To enter stop mode, use the following procedure:
When the CM05 bit in the CM0 register is set to 1 (main clock stopped), do not execute the following
commands:
(1) Input an “L” signal to the RESET pin and CNVSS pin
(2) Wait for td(P-R) (internal power supply stabilization time) or more after the voltage applied to the
(3) Input an “L” (pull-down) to the P6_5 or an “H” (pull-up) to the P6_7
(4) Input an “L” (pull-down) to the EPM (P5_5) and an “H” (pull-up) to the CE (P5_0)
(5) Input an “H” to the CNVSS pin
(6) Input an “H” to the RESET pin (out of reset)
•
•
•
•
•
•
Set the FMR01 bit to 0 (CPU rewrite mode disabled) before setting the CM10 bit to 1 (stop mode).
Execute the JMP.B instruction right after the instruction to set the CM10 bit to 1 (stop mode).
Program command
Block erase command
Lock bit program command
Read lock bit status command
e.g.,
Consumption Mode
VCC1 pin rises above 3.0 V
L1:
JMP.B
Program after exiting stop mode
BSET
0,
L1
CM1
; Stop mode
28. Usage Notes
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