HD6417708RF100A Renesas Electronics America, HD6417708RF100A Datasheet - Page 448
HD6417708RF100A
Manufacturer Part Number
HD6417708RF100A
Description
IC SUPERH MPU ROMLESS 144LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417708SF60V.pdf
(635 pages)
Specifications of HD6417708RF100A
Core Processor
SH-2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, SCI, SmartCard
Peripherals
POR, WDT
Number Of I /o
8
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
3.15 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
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Bit 2n + 1 (n = 0–7): Port Pull-Up Control (PBnPUP): Controls the pull-up of each bit in the 8-bit
port by means of built-in resistors. This setting is valid even if the port pin is set to output by the
PBnIO bit. Therefore, to avoid unnecessary power consumption and ensure the reliability of the
chip, a pull-up setting should not be made when the corresponding port pin has been set to output.
Bit 2n + 1: PBnPUP Description
0
1
Bit 2n (n = 0–7)—Port I/O Control (PBnDIR): Controls whether each bit of 8-bit port is an input
or an output.
Bit 2n: PBnIO
0
1
15.2.2
The port data register (PDTR) is an 8-bit read/write register used as data latches for each bit of the
8-bit port. When a bit is set to be used as an output, the value written into PDTR is output from the
external pin. When a value is read from PDTR, the external pin value sampled on the external bus
clock is returned.
PDTR is not initialized by a power-on reset or manual reset, or in standby mode, and it retains its
contents. However, if PDTR is read when a bus release request is issued (when BREQ is asserted),
its value may not be read correctly. Therefore, BREQ should not be asserted when reading PDTR.
428
Initial value:
Bit name:
Port Data Register (PDTR)
R/W:
Bit:
PB7DT
Bit n (n = 0–7) of the 8-bit port is pulled up.
Bit n (n = 0–7) of the 8-bit port is not pulled up.
Description
Bit n (n = 0–7) of the 8-bit port is an input.
Bit n (n = 0–7) of the 8-bit port is an output.
R/W
—
7
PB6DT
R/W
—
6
PB5DT
R/W
—
5
PB4DT
R/W
—
4
PB3DT
R/W
—
3
PB2DT
R/W
—
2
PB1DT
R/W
—
1
(Initial value)
(Initial value)
PB0DT
R/W
—
0
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