M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 157
M306N4FGTFP#U0
Manufacturer Part Number
M306N4FGTFP#U0
Description
MCU 5V 256K T-TEMP PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N4FGTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M306N4FGTFP#U0M306N4FGTFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 14.3 INVC1 Register
Three-Phase PWM Control Register 1
NOTES:
b7
0
1. Rewrite the INVC1 register after the PRC1 bit in the PRCR register is set to 1 (write enabled).
2. The following table lists how the INV11 bit works.
3. When the INV06 bit is set to 1 (sawtooth wave modulation mode), set the INV11 bit to 0 (three-phase
4. The INV13 bit is enabled only when the INV06 bit is set to 0 (Triangular wave modulation mode) and the
5. If the following conditions are all met, set the INV16 bit to 1 (rising edge of the three-phase output shift
6. Selected by the PCLK0 bit in the PCLKR register.
b6
Apr 14, 2006
Timers A1, A2, A4, and B2 must be stopped during rewrite.
mode 0). Also, when the INV11 bit is set to 0, set the PWCON bit in the TB2SC register to 0 (timer B2 is
reloaded when the timer B2 underflows).
INV11 bit to 1 (three-phase mode 1).
register).
If above conditions are not met, set the INV16 bit to 0 (falling edge of a one-shot pulse of timers A1, A2,
and A4).
Mode
Registers TA11, TA21, and TA41
Bits INV00 and INV01
INV13 bit
The INV15 bit is set to 0 (dead time timer enabled)
The Dij bit (i=U, V or W, j=0, 1) and DiBj bit always have different values when the INV03 bit is set to
1. (The positive-phase and negative-phase always output opposite level signals.)
b5
b4
b3
Item
b2
page 133 of 376
b1
b0
INV16
Symbol
INV10
INV12
INV13
INV14
INV15
INV11
(b7)
Bit
-
Symbol
INVC1
Three-phase mode 0
Not used
Disabled.
The ICTB2 counter is incremented
whenever the timer B2 underflows
Disabled
Carrier wave detect
flag
Timers A1, A2, and A4
start trigger select bit
Timer A1-1, A2-1, A4-1
control bit
Dead time timer
count source select bit
Output polarity control
bit
Dead time disable bit
Dead time timer
trigger select bit
Reserved bit
(4)
Bit Name
INV11 = 0
(2)
(1)
Address
01C9h
0: Timer B2 underflow
1: Timer B2 underflow and write to
0: Three-phase mode 0
1: Three-phase mode 1
0 : f1 or f2
1 : f1 divided-by-2 or f2 divided-by-2
0: Timer A1 reload control signal is 0
1: Timer A1 reload control signal is 1
0 : Active "L" of an output waveform
1 : Active "H" of an output waveform
0: Dead time enabled
1: Dead time disabled
0: Falling edge of a one-shot pulse of
1: Rising edge of the three-phase output
14. Three-Phase Motor Control Timer Function
Set to 0
timer B2
timers A1, A2, and A4
shift register (U-, V-, W-phase)
Three-phase mode 1
Used
Enabled
Enabled when INV11=1 and INV06=0
(6)
After Reset
Function
00h
INV11 = 1
(3)
(5)
RW
RW
RW
RW
RW
RW
RW
RO
RW
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