M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 85
M306N4FGTFP#U0
Manufacturer Part Number
M306N4FGTFP#U0
Description
MCU 5V 256K T-TEMP PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N4FGTFP#U0
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M306N4FGTFP#U0M306N4FGTFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 8.11 Procedure to Use PLL Clock as CPU Clock Source
Apr 14, 2006
page 61 of 376
NOTE:
Set the CM11 bit to 1 (PLL clock for the CPU clock source).
1. PLL operating mode can be entered from high-speed mode.
Set the CM07 bit to 0 (main clock), bits CM17 to CM16
to 00b (main clock undivided), and the CM06 bit to 0
(bits CM16 and CM17 enabled).
Using the PLL clock as the clock source for the CPU
Wait until the PLL clock becomes stable (tsu(PLL)).
Set bits PLC02 to PLC00 (multiplying factor).
Set the PLC07 bit to 1 (PLL operation).
(When PLL clock > 16 MHz)
Set the PM20 bit to 0 (2-wait state).
END
(1)
8. Clock Generation Circuit
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