HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 218
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
- Current page: 218 of 907
- Download datasheet (6Mb)
Section 7 Refresh Controller
Contention between RTCOR Write and Compare Match: If a compare match occurs in the T
state of an RTCOR write cycle, writing takes priority and the compare match signal is inhibited.
See figure 7.22.
RTCNT Operation at Internal Clock Source Switchover: Switching internal clock sources may
cause RTCNT to increment, depending on the switchover timing. Table 7.9 shows the relation
between the time of the switchover (by writing to bits CKS2 to CKS0) and the operation of
RTCNT.
The RTCNT input clock is generated from the internal clock source by detecting the falling edge
of the internal clock. If a switchover is made from a high clock source to a low clock source, as in
case No. 3 in table 7.9, the switchover will be regarded as a falling edge, an RTCNT clock pulse
will be generated, and RTCNT will be incremented.
Rev. 7.00 Sep 21, 2005 page 192 of 878
REJ09B0259-0700
Figure 7.22 Contention between RTCOR Write and Compare Match
Address bus
Internal
write signal
RTCNT
RTCOR
Compare
match signal
RTCOR write cycle by CPU
T
1
RTCNT address
N
N
T
2
RTCOR write data
T
3
N + 1
Inhibited
M
3
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