HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 517
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
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Receiving Multiprocessor Serial Data
Figure 13.12 shows a sample flowchart for receiving multiprocessor serial data and indicates
the procedure to follow.
No
No
No
Figure 13.12 Sample Flowchart for Receiving Multiprocessor Serial Data (1)
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data from RDR
Read receive data from RDR
Set MPIE bit to 1 in SCR
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
Read RDRF flag in SSR
Finished receiving?
FER
FER
Start receiving
RDRF = 1?
RDRF = 1?
Own ID?
Initialize
End
ORER = 1
ORER = 1
No
Yes
Yes
No
Yes
No
Yes
Yes
Yes
3
1
2
No
(continued on next page)
Error handling
4
5
1.
2.
3.
4.
5.
SCI initialization: the receive data function
of the RxD pin is selected automatically.
ID receive cycle: set the MPIE bit to 1 in SCR.
SCI status check and ID check: read SSR,
check that the RDRF flag is set to 1, then read
data from RDR and compare with the
processor’s own ID. If the ID does not match,
set the MPIE bit to 1 again and clear the
RDRF flag to 0. If the ID matches, clear the
RDRF flag to 0.
SCI status check and data receiving: read
SSR, check that the RDRF flag is set to 1,
then read data from RDR.
Receive error handling and break detection:
if a receive error occurs, read the
ORER and FER flags in SSR to identify the error.
After executing the necessary error handling,
clear the ORER and FER flags both to 0.
Receiving cannot resume while either the ORER
or FER flag remains set to 1. When a framing
error occurs, the RxD pin can be read to detect
the break state.
Section 13 Serial Communication Interface
Rev. 7.00 Sep 21, 2005 page 491 of 878
REJ09B0259-0700
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