HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 635
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
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19.5.4
To erase the flash memory, follow the erasing algorithm shown in figure 19.10. This erasing
algorithm can erase data without subjecting the device to voltage stress or impairing the reliability
of programmed data.
To erase flash memory, before starting to erase, first place all memory data in all blocks to be
erased in the programmed state (program all memory data to H'00). If all memory data is not in the
programmed state, follow the sequence described later to program the memory data to zero. To
select the flash memory areas to be erased, first set the V
register (FLMCR), wait 5 to 10 µs, and set up erase block registers 1 and 2 (EBR1 and EBR2).
Next set the E bit in FLMCR, selecting erase mode. The erase time is the time during which the
E bit is set. To prevent overerasing, use a software timer to divide the erase time. Overerasing, due
to program runaway for example, can give memory cells a negative threshold voltage and cause
them to operate incorrectly. Before selecting erase mode, set up the watchdog timer so as to
prevent overerasing.
19.5.5
In program-verify mode, after data has been erased, it is read to check that it has been erased
correctly. After the erase time has elapsed, exit erase mode (clear the E bit to 0), select erase-
verify mode (set the EV bit to 1), and wait 4 µs. Before reading data in erase-verify mode, write
H'FF dummy data to the address to be read. This dummy write applies an erase-verify voltage to
the memory cells at the latched address. If the flash memory is read in this state, the data at the
latched address will be read. After the dummy write, wait 2 µs before reading. If the read data has
been successfully erased, perform the dummy write, wait 2 µs, and erase-verify for the next
address. If the read data has not been erased, select erase mode again and repeat the same erase
and erase-verify sequence through the last address, until all memory data has been erased to 1. Do
not repeat the erase and erase-verify sequence more than 602 times, however.
Erase Mode
Erase-Verify Mode
Section 19 Flash Memory (H8/3048F: Dual Power Supply (V
PP
Rev. 7.00 Sep 21, 2005 page 609 of 878
E bit in the flash memory control
REJ09B0259-0700
PP
= 12 V))
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