HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 558
HD6417727BP160CV
Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP160CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Price
Company:
Part Number:
HD6417727BP160CV
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LITEON
Quantity:
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Part Number:
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Section 17 Serial Communication Interface (SCI)
SCPDR Bit 1—Serial Clock Port Data (SCP1DT): Specifies the serial port SCK0 pin I/O data.
Input or output is specified by the SCP1MD0 and SCP1MD1 bits. In output mode, the value of
the SCP1DT bit is output from the SCK0 pin.
Bit 1:
SCP1DT
0
1
SCPCR Bits 1 and 0—Serial Port Break I/O (SCP0MD1, SCP0MD0): These bits specify the
serial port TxD0 pin output condition. When the TxD0 pin is actually used as a port output pin
and outputs the value set with the SCP0DT bit, clear the TE bit of SCSCR to 0.
Bit 1:
SCP0MD1
0
0
SCPDR Bit 0—Serial Port Break Data (SCP0DT): Specifies the serial port RxD0 pin input data
and TxD0 pin output data. The TxD0 pin output condition is specified by the SCP0MD0 and
SCP0MD1 bits. When the TxD0 pin is set to output mode, the value of the SCP0DT bit is output
to the TxD0 pin. The RxD0 pin value is read from the SCP0DT bit regardless of the values of the
SCP0MD0 and SCP0MD1 bits, if RE in the SCSCR is set to 1. The initial value of this bit after a
power-on reset is undefined.
Bit 0:
SCP0DT
0
1
Block diagrams of the SCI I/O ports are shown in figures 17.2 to 17.4.
17.2.9
Rev.6.00 Mar. 27, 2009 Page 500 of 1036
REJ09B0254-0600
Initial value:
Bit Rate Register (SCBRR)
R/W:
Bit:
Description
I/O data is low
I/O data is high
Bit 0:
SCP0MD0
0
1
Description
I/O data is low
I/O data is high
R/W
7
1
R/W
6
1
Description
SCP0DT bit value is not output to TxD0 pin
SCP0DT bit value is output to TxD0 pin
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
(Initial value)
(Initial value)
(Initial value)
R/W
0
1
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