HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1002

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 27 A/D Converter
27.4.4
The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog
input at a time t
conversion timing. Table 27.3 indicates the A/D conversion time.
As indicated in figure 27.5, the A/D conversion time includes t
length of t
time therefore varies within the ranges indicated in table 27.3.
In multi mode and scan mode, the values given in table 27.3 apply to the first conversion. In the
second and subsequent conversions the conversion the conversion time is fixed at 512 states
(fixed) when CKS1 = 1 and CKS0 = 0, 256 states (fixed) when CKS1 = 0 and CKS0 = 1, and 128
states (fixed) when CKS1 = 0 and CKS0 = 0.
Page 942 of 1414
Input Sampling and A/D Conversion Time
D
varies depending on the timing of the write access to ADCSR. The total conversion
D
t
t
t
Notes:
D
SPL
CONV
after the ADST bit is set to 1, then starts conversion. Figure 27.5 shows the A/D
Input sampling
A/D conversion start delay
Input sampling time
A/D conversion time
1. ADCSR write cycle
2. ADCSR address
Address
timing
Figure 27.5 A/D Conversion Timing
signal
Write
ADF
Pφ
*
*
1
2
t
D
t
SPL
t
CONV
D
and the input sampling time. The
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010