HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1103

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
31.3.10 Command Timeout Control Register (CTOCR)
CTOCR specifies a cycle to generate a timeout for the command response.
When receiving the command response, CTOUTC continues counting the transfer clock, and
enters the command timeout error state when the number of transfer clock reaches the number
specified in CTOCR. When the CTERIE bit in INTCR1 is set to 1, the CTERI flag in INTSTR1 is
set. To perform command timeout error handling, the command sequence should be aborted by
setting the CMDOFF bit to 1, and then the CTERI flag should be cleared.
Note: When R2 response (17-byte command response) is required, a timeout is generated during
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7 to 1
0
response reception if the CTSEL0 bit is set to 0. Therefore, set the CTSEL0 bit to 1.
Bit Name
⎯
CTSEL0 1
Initial
Value
All 0
R/W
⎯
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
1: 256 transfer clocks from command transmission completion
0: 128 transfer clocks from command transmission completion
to response reception completion
to response reception completion
Section 31 MultiMediaCard Interface (MMCIF)
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