HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 240
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Section 4 Memory Management Unit (MMU)
3. There is the possibility of simultaneous TLB hits in more than one way. These hits may occur
The object compared varies depending on the page management information (SZ, SH) in the TLB
entry. It also varies depending on whether the system supports multiple virtual memory or single
virtual memory.
The page-size information determines whether VPN (11 to 10) is compared. VPN (11 to 10) is
compared for 1-kbyte pages (SZ = 0) but not for 4-kbyte pages (SZ = 1).
The sharing information (SH) determines whether the PTEH.ASID and the ASID in the TLB entry
are compared. ASIDs are compared when there is no sharing between processes (SH = 0) but not
when there is sharing (SH = 1).
When single virtual memory is supported (MMUCR.SV = 1) and privileged mode is engaged
(SR.MD = 1), all process resources can be accessed. This means that ASIDs are not compared
when single virtual memory is supported and privileged mode is engaged. The objects of address
comparison are shown in figure 4.10.
Page 180 of 1414
depending on the contents of ASID in PTEH when a page to which SH is set 1 is registered in
the TLB in index mode (MMUCR.IX = 1). Therefore a page to which SH is set 1 must not be
registered in index mode. When memory is shared by several processings, different pages must
be registered in each ASID.
MMUCR.SV = 1)?
(SR.MD = 1 and
Bits compared:
VPN 31 to 17
VPN 11 to 10
SH = 1 or
SZ = 0?
Yes
Yes (1-kbyte)
Figure 4.10 Objects of Address Comparison
Bits compared:
VPN 31 to 17
No (4-kbyte)
No
Bits compared:
VPN 31 to 17
VPN 11 to 10
ASID 7 to 0
SZ = 0?
Yes (1-kbyte)
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Bits compared:
VPN 31 to 17
ASID 7 to 0
No (4-kbyte)
Sep 21, 2010
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