HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 271

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
(2)
Write the longword data specified by the data filed, to the position specified by L of the address
field, in the entry that corresponds to the entry address and the way specified by the address field.
Table 5.8
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Cache Size
16 kbytes
32 kbytes
(1) Address array access
(2) Data array access (both read and write accesses)
Data-Array Write
*: Don’t care bit
X: 0 for read, don’t care for write
(b) Data specification (both read and write accesses)
Figure 5.4 Specifying Address and Data for Memory-Mapped Cache Access
(a) Address specification
(b) Data specification
(a) Address specification
Read access
Write access
Address Format Based on the Size of Cache to be Assigned to Memory
31
31
31
31
31
1111 0000
1111 0000
1111 0001
24
24
24
Tag address (31 to 10)
23
23
23
*--------*
*--------*
*--------*
Entry Address Bits
11 to 4
12 to 4
14
14
14
(16-kbyte mode)
13
13
13
W
W
W
12
12
12
Longword
11
11
10
11
Entry address
Entry address
Entry address
9
LRU
W Bit
13 and 12
14 to 13
4
4
4
4
3
3
3
3
A
0
X
L
X
2
2
2
*
*
2
0
0
1
1
Section 5 Cache
0
U
Page 211 of 1414
0
0
0
0
0
0
V
0
0