HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 902

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 25 USB Function Controller (USBF)
• Data Stage (Control-Out)
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is out-
transfer, the application waits for data from the host, and after data is received (IFR0/EP0o TS =
1), reads data from the FIFO. Next, the application writes 1 to the EP0o read complete bit, empties
the receive FIFO, and waits for reception of the next data.
The end of the data stage is identified when the host transmits an IN token and the status stage is
entered.
Page 842 of 1414
Data reception from host
OUT token reception
OUT token reception
(IFR0/EP0o TS = 1)
Set EP0o reception
USB function
to TRG/EP0s
complete flag
to TRG/EP0o
Figure 25.8 Data Stage (Control-Out) Operation
1 written
1 written
RDFN?
RDFN?
Yes
Yes
ACK
No
No
NAK
NAK
Interrupt request
receive data size register
data register (EPDR0o)
(TRG/EP0o RDFN = 1)
Read data from EP0o
Read data from EP0o
Clear EP0o reception
Write 1 to EP0o read
(IFR0/EP0o TS = 0)
complete flag
Application
complete bit
(EPSZ0o)
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010