HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 929
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
13
12
11
10
9
8
7, 6
Bit Name
DISPPOL
DPOL
⎯
MCNT
CL1CNT
CL2CNT
⎯
Initial Value R/W
0
0
0
0
0
1
All 0
R/W
R/W
R/W
R/W
R/W
R
R
Description
DISP (Display Enable) Polarity Select
Selects the polarity of the LCD_M_DISP (display
enable) for the LCD module.
0: LCD_M_DISP is high active
1: LCD_M_DISP is low active
Display Data Polarity Select
Selects the polarity of the LCD_DATA (display data)
for the LCD module. This bit supports inversion of
the LCD module.
0: LCD_DATA is high active, transparent-type LCD
1: LCD_DATA is low active, reflective-type LCD
Reserved
This bit is always read as 0. The write value should
always be 0.
M Signal Control
Sets whether or not to output the LCD's current-
alternating signal of the LCD module.
0: M (AC line modulation) signal is output
1: M signal is not output
CL1 (Horizontal Sync Signal) Control
Sets whether or not to enable CL1 output during the
vertical retrace period.
0: CL1 is output during vertical retrace period
1: CL1 is not output during vertical retrace period
CL2 (Dot Clock of LCD Module) Control
Sets whether or not to enable CL2 output during the
vertical and horizontal retrace period.
0: CL2 is output during vertical and horizontal
1: CL2 is not output during vertical and horizontal
Reserved
These bits are always read as 0. The write value
should always be 0.
retrace period
retrace period
panel
panel
Section 26 LCD Controller (LCDC)
Page 869 of 1414
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