M30835FJGP#U3 Renesas Electronics America, M30835FJGP#U3 Datasheet - Page 23
M30835FJGP#U3
Manufacturer Part Number
M30835FJGP#U3
Description
IC M32C/83 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30835FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Chapter 1 Overview
1 .
0
(1) Data Registers (R0, R0H, R0L, R1, R1H, R1L, R2, R3, R2R0, and R3R1)
(2) Address Registers (A0 and A1)
(3) Static Base Register (SB)
(4) Frame Base Register (FB)
(5) Program Counter (PC)
(6) Interrupt Table Register (INTB)
(7) User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
(8) Flag Register (FLG)
(9) Save Flag Register (SVF)
(10) Save PC Register (SVP)
9
0 .
B
These registers consist of 16 bits, and are used primarily for transfers and arithmetic/logic operations.
Registers R0 and R1 can be halved into separate high-order (R0H, R1H) and low-order (R0L, R1L) parts
for use as 8-bit data registers. Moreover, you can combine R2 and R0 or R3 and R1 to configure a 32-
bit data register (R2R0 or R3R1).
These registers consist of 24 bits, and have the similar functions as the data registers. These registers
are used for address register-based indirect addressing and address register-based relative address-
ing.
This register consists of 24 bits, and is used for SB-based relative addressing.
This register consists of 24 bits, and is used for FB-based relative addressing.
This counter consists of 24 bits, indicating the address of an instruction to be executed next.
This register consists of 24 bits, indicating the initial address of an interrupt vector table.
There are two types of stack pointers: user stack pointer (USP) and interrupt stack pointer (ISP), each
consisting of 24 bits.
The stack pointer (USP/ISP) you want can be switched by a stack pointer select flag (U flag).
The stack pointer select flag (U flag) is bit 7 in the flag register (FLG).
Set an even number to USP and ISP. When an even number is set, execution becomes efficient.
This register consists of 11 bits, and is used as a flag, one bit for one flag. For details about the function
of each flag, see Section 1.4, "Flag Register (FLG)."
This register consists of 16 bits and is used to save the flag register when a high-speed interrupt is
generated.
This register consists of 16 bits and is used to save the program counter when a high-speed interrupt is
generated.
0
0
3
1
2
9
0
0 -
0
6
1
0 .
0
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1.3 Register Configuration
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