M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 199
M30835FJGP#U5
Manufacturer Part Number
M30835FJGP#U5
Description
IC M32C/83 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30835FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30835FJGP#U5M30835FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R
R
M
e
E
3
. v
J
Figure 16.2 U0TB to U4TB Registers and U0RB to U4RB Registers
2
0
1
9
C
3 .
B
8 /
0
1
3
0
3
UARTi Transmit Buffer Register
J
UARTi Receive Buffer Register
G
b15
4
a
0 -
b15
n
o r
3 .
NOTES:
1
u
NOTES:
, 1
3
p
1. Use the MOV instruction to set the UiTB register.
1
1. The ABT bit can be set to "0" only.
2. When the SMD2 to SMD0 bits in the UiMR register is set to "000
3. These error flags are disabled when the SMD2 to SMD0 bits in the UiMR register are set to "001
2
(
M
0
in the UiC1 register is set to "0" (receive disable), the OER, FER, PER and SUM bits are set to "0"
(no error occurs).
When all OER, FER and PER bits are set to "0" (no error), the SUM bit is set to "0" (no error).
Also, the FER and PER bits are set to "0" by reading low-order bits in the UiRB register.
(clock synchronous serial I/O mode, special mode 2, or special mode 3) or to "010
When read, the contents are indeterminate.
0
3
6
2
b8
b8
C
b7
8 /
Page 174
b7
, 3
M
3
2
C
f o
b0
b0
8 /
4
3
8
(b15 - b9)
(b7 - b0)
(b10 - b9)
(b7 - b0)
) T
Symbol
Symbol
8
(b8)
OER
SUM
FER
PER
Symbol
U0RB to U2RB 036F
U3RB, U4RB
ABT
(b8)
Bit
Bit
Symbol
U0TB to U2TB 036B
U3TB, U4TB
Transmit data (D
Transmit data (D
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Arbitration Lost
Detect Flag
Overrun Error Flag
Framing Error
Flag
Parity Error Flag
Error Sum Flag
Nothing is assigned.
When write, set to "0".
When read, its content is indeterminate.
(2, 3)
(i=0 to 4)
Bit Name
(i=0 to 4)
Address
032F
Address
032B
(1)
16
16
16-
16-
-
-
036E
032E
(2, 3)
036A
032A
8
(2, 3)
(1)
7
)
to D
(2)
16,
16,
16
16
, 02EB
, 02FB
Received data (D
0: Not detected (win)
1: Detected (lose)
0: No overrun error occurs
1: Overrun error occurs
Received data (D
0: No framing error occurs
1: Framing error occurs
0: No parity error occurs
1: Parity error occurs
0
0: No error occurs
1: Error occurs
02EF
02FF
)
Function
16-
16-
16
16
02EA
02FA
-
-
02FE
02EE
2
" (serial I/O disable) or the RE bit
16
16
16
16,
, 033B
033F
Function
7
8
)
to D
16-
16
033A
0
-
)
033E
16
2
" (I
16
2
C mode).
After Reset
Indeterminate
Indeterminate
After Reset
Indeterminate
Indeterminate
2
WO
WO
RW
RW
RW
RO
RO
RO
RO
"
RO
RO
16. Serial I/O
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