M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 418
M30835FJGP#U5
Manufacturer Part Number
M30835FJGP#U5
Description
IC M32C/83 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30835FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30835FJGP#U5M30835FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R
R
M
e
E
3
. v
J
Figure 25.2 ROMCP Register
Figure 25.3 Address to Store ID Code
2
0
1
9
C
3 .
B
8 /
0
1
3
0
3
J
G
4
a
0 -
n
o r
ROM Code Protect Control Address
b7
3 .
1
u
, 1
3
NOTES:
p
1
b6
2
(
1. When the ROMCR bit is set to "00
2. When the ROM code protect level 1 is enabled, the flash memory is protected against reading or
3. The ROMCP register can be written with the page program command.
4. When a value of the ROMCP address is "00
M
0
b5
protect level 1 is enabled, the ROMCR bit cannot be changed in parallel I/O mode. Change the
ROMCR bit in standard serial I/O mode, etc.
rewriting in parallel I/O mode.
0
3
6
2
b4
FFFFDC
FFFFE0
FFFFE4
FFFFE8
FFFFF8
FFFFFC
FFFFEC
FFFFF0
FFFFF4
C
Page 393
8 /
b3
1 1 1 1
, 3
b2
M
16
16
Address
16
16
16
16
16
16
16
b1
3
2
to FFFFEB
to FFFFFB
to FFFFE3
to FFFFE7
to FFFFF3
to FFFFF7
to FFFFFF
to FFFFDF
to FFFFEF
C
b0
f o
8 /
4
ROMCP1
3
(b3 - b0)
ROMCR
8
Symbol
) T
8
Bit
Symbol
ROMCP
16
16
16
16
16
16
16
16
16
Reserved Bit
ROM Code Protect
Reset Bit
ROM Code Protect
Level 1 Set Bit
2
", the ROM code protect level 1 is disabled. When the ROM code
Bit Name
ID1
ID2
ID3
ID4
ID5
ID6
ID7
(1)
Address
0FFFFFF
16
" or "FF
(2)
(3)
Undefined Instruction Vector
Overflow Vector
BRK Instruction Vector
Address Match Vector
Watchdog Timer Vector
NMI Vector
Reset Vector
16
16
4 bytes
", the ROM code protect function is disabled.
b5 b4
b7 b6
0 0 : Disables ROM code protection
0 1 : Enables the ROMCP bit
1 0 : Enables the ROMCP bit
1 1 : Enables the ROMCP bit
0 0 : Enables ROM code protection
0 1 : Enables ROM code protection
1 0 : Enables ROM code protection
1 1 : ROM code protection inactive
Set to "1"
After Reset
FF
Function
16
25. Flash Memory Version
RW
RW
RW
RW
RW
RW
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