M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 497
M30835FJGP#U5
Manufacturer Part Number
M30835FJGP#U5
Description
IC M32C/83 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30835FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30835FJGP#U5M30835FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R
R
M
e
E
3
. v
J
2
0
C
1
9
3 .
B
8 /
0
27.8.2.4 Timer A (Pulse Width Modulation Mode)
1
3
0
(d) The IR bit is set to "1" when the timer operation mode is selected as follows:
(e) When a trigger is generated while counting, the reload register reloads and continues counting
(f) The TA1
(g) If an external trigger input is selected to start counting in timer A one-shot timer mode, do not
(a) TAiS(i=0 to 4) bit in the TABSR register is set to "0" (stops counting) after reset. Set TAiS bit to "1"
(b) The IR bit is set to "1" when the timer operation mode is selected as follows:
(c) The followings occur when the TAiS bit is set to "0" (stops counting) while PWM pulse is output:
(d) The TA1
3
J
G
operation mode is selected as is described above.
after the counter has downcounted once following a re-trigger. To generate a trigger while counting,
wait at least 1 count source cycle after the previous trigger has been generated and generate a re-
trigger.
applied to the NMI pin while the INV03 to INV02 bits in the INVC0 register is set to "11
cutoff of the three-phase output by an "L" signal applied to the NMI pin).
provide another external trigger input again for 300 ns before the timer A counter value reaches
"0000
(starts counting) after selecting an operating mode and setting the TAi register.
operation mode is selected as is described above.
applied to the NMI pin while the INV03 to INV02 bits in the INVC0 register are set to "1" (three-phase
output forced cutoff enabled).
4
a
Therefore, set the IR bit to "0" by program when generating a timer Ai interrupt (IR bit), if the timer
o r
0 -
• one-shot timer mode is selected after reset.
• timer mode is switched to one-shot timer mode.
• event counter mode is switched to one-shot timer mode.
Therefore, set the IR bit to "0" by program when generating a timer Ai interrupt (IR bit), if the timer
n
• PWM mode is selected after reset.
• timer mode is switched to PWM mode.
• event counter mode is switched to PWM mode.
• The counter stops counting.
• The IR bit changes to "1" and the output level changes to low ("L") when TAi
• The IR bit and the output level remain unchanged when TAi
3 .
u
1
, 1
3
p
1
16
(
2
M
0
". One-shot timer may stop counting.
0
3
6
2
OUT
OUT
C
8 /
Page 472
, TA2
_______
_______
, TA2
, 3
M
3
OUT
OUT
2
C
f o
8 /
and TA4
and TA4
4
3
8
) T
8
OUT
OUT
pins are placed in high-impedance states when an "L" signal is
pins are placed in high-impedance states when an "L" signal is
_______
OUT
pin is held low ("L").
OUT
27. Precautions (Timer)
pin is held high ("H").
2
" (forced
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