M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 9
M30835FJGP#U5
Manufacturer Part Number
M30835FJGP#U5
Description
IC M32C/83 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30835FJGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30835FJGP#U5M30835FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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10. Interrupts___________________________________ 89
11. Watchdog Timer ____________________________ 111
12. DMAC_____________________________________ 114
10.1 Types of Interrupts ................................................................................................. 89
10.2 Software Interrupts ................................................................................................ 89
10.3 Hardware Interrupts ............................................................................................... 90
10.4 High-Speed Interrupt ............................................................................................. 91
10.5 Interrupts and Interrupt Vectors ........................................................................... 91
10.6 Interrupt Request Reception ................................................................................. 95
10.7 INT Interrupt .......................................................................................................... 105
10.8 NMI Interrupt ......................................................................................................... 106
10.9 Key Input Interrupt ............................................................................................... 106
10.10 Address Match Interrupt .................................................................................... 107
10.11 Intelligent I/O Interrupt and CAN Interrupt ....................................................... 108
12.1 Transfer Cycles .................................................................................................... 121
10.2.1 Undefined Instruction Interrupt ..................................................................... 89
10.2.2 Overflow Interrupt ........................................................................................... 89
10.2.3 BRK Interrupt .................................................................................................. 89
10.2.4 BRK2 Interrupt ................................................................................................ 90
10.2.5 INT Instruction Interrupt ................................................................................. 90
10.3.1 Special Interrupts ............................................................................................ 90
10.3.2 Peripheral Function Interrupt ........................................................................ 91
10.5.1 Fixed Vector Tables ........................................................................................ 92
10.5.2 Relocatable Vector Tables .............................................................................. 92
10.6.1 I Flag and IPL ................................................................................................... 95
10.6.2 Interrupt Control Register and RLVL Register ............................................. 95
10.6.3 Interrupt Sequence ......................................................................................... 99
10.6.4 Interrupt Response Time .............................................................................. 100
10.6.5 IPL Change when Interrupt Request is Acknowledged ............................. 101
10.6.6 Saving a Register .......................................................................................... 102
10.6.7 Restoration from Interrupt Routine ............................................................. 102
10.6.8 Interrupt Priority ............................................................................................ 103
10.6.9 Interrupt Priority Level Select Circuit ......................................................... 103
12.1.1 Effect of Source and Destination Addresses ............................................. 121
12.1.2 Effect of the DS Register .............................................................................. 121
12.1.3 Effect of Software Wait State ....................................................................... 121
12.1.4 Effect of RDY Signal ..................................................................................... 121
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A-3
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