M30803FGFP#U3 Renesas Electronics America, M30803FGFP#U3 Datasheet - Page 187
![MCU 3/5V 256K I-TEMP PB-FREE 100](/photos/12/21/122166/qfp100-g1_pkg_sml.jpg)
M30803FGFP#U3
Manufacturer Part Number
M30803FGFP#U3
Description
MCU 3/5V 256K I-TEMP PB-FREE 100
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet
1.M30803FGGPU3.pdf
(360 pages)
Specifications of M30803FGFP#U3
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
e
E
1
v
Table 21.6 Repeat sweep mode 1 specifications
Figure 21.8 A/D conversion register in repeat sweep mode 1
J
6
Function
Start condition
Stop condition
Interrupt request generation timing None generated
Input pin
With emphasis on the pin AN
Reading of result of A/D converter Read A/D register corresponding to selected pin (at any time)
1 .
0
(5) Repeat sweep mode 1
C
9
0 .
A/D control register 0 (Note)
A/D control register 1 (Note 1)
In repeat sweep mode 1, all pins are used for A/D conversion with emphasis on the pin or pins selected
using the A/D sweep pin select bit. Table 21.6 shows the specifications of repeat sweep mode 1. Figure
21.8 shows the A/D control register in repeat sweep mode 1.
8 /
b7
b7
B
0
0
0
b6
1
b6
A
8
G
u
7
b5
b5
o r
1
. g
0 -
u
1
Item
0
b4
1
b4
p
0
, 2
0
b3
b3
1
2
Note 1: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.
Note 2: Neither ‘01’ nor ‘10’ can be selected with the external op-amp connection mode bit.
Note 3: When f(X
Note 4: Set "0" to PSL3_5 and PSL3_6 of the function select register B3.
Note 5: Set "1" to PSL3_5 of the function select register B3.
Note 6: Set "1" to PSL3_6 of the function select register B3.
Note 7: Set "1" to PSL3_5 and PSL3_6 of the function select register B3.
0
b2
b2
1
0
5
Note: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.
b1
b1
Page 174
b0
b0
Bit symbol
Bit symbol
SCAN0
SCAN1
CKS1
OPA0
OPA1
VCUT
BITS
ADST
CKS0
MD2
All pins perform repeat sweep A/D conversion, with emphasis on the pin or
pins selected by the A/D sweep pin select bit
Example : AN
Writing “1” to A/D conversion start flag
Writing “0” to A/D conversion start flag
AN
MD0
MD1
TRG
CH0
CH1
CH2
Symbol
ADCON1
Symbol
ADCON0
IN
) is over 10 MHz, the f
f o
0
0
to AN
(1 pin), AN
3
2
9
Analog input pin
select bit
A/D operation mode
select bit 0
Trigger select bit
A/D conversion start flag
Frequency select bit 0
A/D sweep pin select bit
A/D operation mode
select bit 1
8/10-bit mode select bit
Frequency select bit 1
(Note 3)
Vref connect bit
External op-amp
connection mode
bit (Note 2)
7
0
Bit name
Bit name
selected
0
and AN
Address
Address
0396
0397
AD
frequency must be under 10 MHz by dividing.
16
16
1
AN
(2 pins), AN
Specification
00000XXX
When reset
When reset
1 : Repeat sweep mode 1
b7 b6
When repeat sweep mode 1 is selected
0 : 8-bit mode
1 : 10-bit mode
0 : f
1 : f
1 : Vref connected
0 0 : ANEX0 and ANEX1 are not used(Note 4)
0 1 : ANEX0 input is A/D converted(Note 5)
1 0 : ANEX1 input is A/D converted(Note 6)
1 1 : External op-amp connection mode(Note 7)
0 : A/D conversion disabled
1 : A/D conversion started
0
Invalid in repeat sweep mode 1
b4 b3
1 1 : Repeat sweep mode 1
0 : Software trigger
1 : AD
0 : f
1 : f
0 0 : AN
0 1 : AN
1 0 : AN
1 1 : AN
b1 b0
00
AD
AD
AD
AD
/2 or f
16
/4 is selected
/2 is selected
AN
TRG
is selected
0
0
0
0
, AN
1
(1 pin)
to AN
to AN
trigger
2
0
AD
to AN
1
/4 is selected
(2 pins)
2
3
AN
(3 pins)
(4 pins)
Function
Function
0
2
(3 pins), AN
AN
2
AN
21. A/D Converter
0
to AN
0
AN
3
R
(4 pins)
R
3
, etc
W
W
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