UPD78F1142AF1-AN1-A Renesas Electronics America, UPD78F1142AF1-AN1-A Datasheet - Page 121
UPD78F1142AF1-AN1-A
Manufacturer Part Number
UPD78F1142AF1-AN1-A
Description
MCU 16BIT 78K0R/KX3 64-FBGA
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AF1-AN1-A
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1142AF1-AN1-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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4.2.8 Port 7
using port mode register 7 (PM7). When the P70 to P77 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 7 (PU7).
Port 7 is an 8-bit I/O port with an output latch. Port 7 can be set to the input mode or output mode in 1-bit units
This port can also be used for key return input, and interrupt request input.
Reset signal generation sets port 7 to input mode.
Figure 4-22 shows a block diagram of port 7.
WR
P7:
PU7:
PM7:
RD:
WR××: Write signal
WR
WR
RD
PORT
PU
PM
Read signal
Port register 7
Pull-up resistor option register 7
Port mode register 7
PM70 to PM77
PU70 to PU77
(P70 to P77)
Output latch
Alternate
function
PU7
PM7
P7
Figure 4-22. Block Diagram of P70 to P77
CHAPTER 4 PORT FUNCTIONS
User’s Manual U17854EJ9V0UD
EV
DD
P-ch
P70/KR0
P73/KR3,
P74/KR4/INTP8
P77/KR7/INTP11
to
to
119
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