UPD78F1144AF1-BA4-A Renesas Electronics America, UPD78F1144AF1-BA4-A Datasheet - Page 179
UPD78F1144AF1-BA4-A
Manufacturer Part Number
UPD78F1144AF1-BA4-A
Description
MCU 16BIT 78K0R/KX3 64-FBGA
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1144AF1-BA4-A
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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5.6.6 Condition before changing CPU clock and processing after changing CPU clock
Before Change
Internal high-
speed
oscillation
clock
X1 clock
External main
system clock
Condition before changing the CPU clock and processing after changing the CPU clock are shown below.
CPU Clock
X1 clock
External main
system clock
Subsystem
clock
Internal high-
speed
oscillation clock
External main
system clock
Subsystem
clock
Internal high-
speed
oscillation
clock
X1 clock
Subsystem
clock
After Change
Transition not possible
Transition not possible
(To change the clock, set it again after
executing reset once.)
(To change the clock, set it again after
executing reset once.)
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Stabilization of X1 oscillation
• OSCSEL = 1, EXCLK = 0, MSTOP = 0
• After elapse of oscillation stabilization time
Enabling input of external clock from
EXCLK pin
• OSCSEL = 1, EXCLK = 1, MSTOP = 0
Stabilization of X1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Oscillation of internal high-speed
oscillator
• HIOSTOP= 0
Stabilization of XT1 oscillation
• OSCSELS = 1, XTSTOP = 0
• After elapse of oscillation stabilization time
Oscillation of internal high-speed
oscillator
• HIOSTOP= 0
Table 5-5. Changing CPU Clock (1/2)
CHAPTER 5 CLOCK GENERATOR
Condition Before Change
User’s Manual U17854EJ9V0UD
Operating current can be reduced by
stopping internal high-speed oscillator
(HIOSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
X1 oscillation can be stopped (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
External main system clock input can be
disabled (MSTOP = 1).
Processing After Change
−
−
177
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