UPD78F1144AF1-BA4-A Renesas Electronics America, UPD78F1144AF1-BA4-A Datasheet - Page 649
UPD78F1144AF1-BA4-A
Manufacturer Part Number
UPD78F1144AF1-BA4-A
Description
MCU 16BIT 78K0R/KX3 64-FBGA
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1144AF1-BA4-A
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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(2) When detecting level of input voltage from external input pin (EXLVI)
• When starting operation
• When stopping operation
Either of the following procedures must be executed.
•
Figure 20-10 shows the timing of the interrupt signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <7> above.
Caution Input voltage from external input pin (EXLVI) must be EXLVI < V
•
<1>
<2>
<3>
<4>
<5>
<6>
<7>
<8>
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
When using 1-bit memory manipulation instruction:
Clear LVION to 0.
Mask the LVI interrupt (LVIMK = 1).
Set bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 1 (detects level of input voltage from
external input pin (EXLVI)).
Clear bit 1 (LVIMD) of LVIM to 0 (generates interrupt signal when the level is detected) (default value).
Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
Use software to wait for the following periods of time (Total 410
Confirm that “input voltage from external input pin (EXLVI) ≥ detection voltage (V
when detecting the falling edge of EXLVI, or “input voltage from external input pin (EXLVI) < detection
voltage (V
Clear the interrupt request flag of LVI (LVIIF) to 0.
Release the interrupt mask flag of LVI (LVIMK).
Execute the EI instruction (when vector interrupts are used).
•
•
•
Operation stabilization time (10
Minimum pulse width (200
Detection delay time (200
EXLVI
= 1.21 V (TYP.))” when detecting the rising edge of EXLVI, at bit 0 (LVIF) of LVIM.
CHAPTER 20 LOW-VOLTAGE DETECTOR
μ
User’s Manual U17854EJ9V0UD
μ
s (MAX.))
s (MIN.))
μ
s (MAX.))
μ
s).
DD
.
EXLVI
= 1.21 V (TYP.))”
647
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