UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1014
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(Unit: kbps)
Caution The values in Table 20-23 do not guarantee the operation of the network system. Thoroughly check
Rate Value
Set Baud
83.3
83.3
83.3
83.3
83.3
83.3
83.3
83.3
83.3
83.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
33.3
100
100
100
100
100
100
100
100
the effect on the network system, taking into consideration oscillation errors and delays of the CAN
bus and CAN transceiver.
Register
Division
Ratio of
C0BRP
Table 20-23. Representative Examples of Baud Rate Settings (f
10
10
12
12
10
10
12
12
15
15
16
16
20
20
24
24
30
30
4
4
5
5
8
8
4
4
6
6
6
6
8
8
Register Set
00000011
00000011
00000100
00000100
00000111
00000111
00001001
00001001
00000011
00000011
00000101
00000101
00000101
00000101
00000111
00000111
00001011
00001011
00001001
00001001
00001011
00001011
00001110
00001110
00001111
00001111
00010011
00010011
00010111
00010111
00011101
00011101
C0BRP
Value
Length of
DBT
20
20
16
16
10
10
24
24
16
16
16
16
12
12
24
24
20
20
16
16
15
15
12
12
10
10
8
8
8
8
8
8
SEGMENT
SYNC
Valid Bit Rate Setting (Unit: kbps)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
SEGMENT
PROP
11
7
9
7
9
3
5
3
5
7
9
5
7
9
5
7
3
5
7
9
7
9
7
9
6
8
5
7
3
5
3
5
SEGMENT1
PHASE
6
5
4
3
3
2
2
1
8
7
5
4
3
2
3
2
2
1
8
7
6
5
4
3
4
3
3
2
3
2
2
1
SEGMENT2
CHAPTER 20 CAN CONTROLLER
PHASE
6
5
4
3
3
2
2
1
8
7
5
4
3
2
3
2
2
1
8
7
6
5
4
3
4
3
3
2
3
2
2
1
CANMOD
TSEG13 to
C0BTR Register Setting
TSEG10
= 8 MHz) (2/2)
1100
1101
1010
1011
0101
0110
0100
0101
1110
1111
1001
1010
1011
1100
0111
1000
0100
0101
1110
1111
1100
1101
1010
1011
1001
1010
0111
1000
0101
0110
0100
0101
Value
TSEG22 to
TSEG20
Page 1014 of 1509
101
100
011
010
010
001
001
000
111
110
100
011
010
001
010
001
001
000
111
110
101
100
011
010
011
010
010
001
010
001
001
000
Sampling
(Unit: %)
Point
70.0
75.0
75.0
81.3
70.0
80.0
75.0
87.5
66.7
70.8
68.8
75.0
81.3
87.5
75.0
83.3
75.0
87.5
66.7
70.8
70.0
75.0
75.0
81.3
73.3
80.0
75.0
83.3
70.0
80.0
75.0
87.5
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