UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1388
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
methods.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The on-chip debug function of the V850ES/JG3-H and V850ES/JH3-H can be implemented by the following two
• Using the DCU (debug control unit)
• Not using the DCU
The following table shows the features of the two on-chip debug functions.
On-chip debug function is implemented by the on-chip DCU in the V850ES/JG3-H and V850ES/JH3-H, with using the
DRST, DCK, DMS, DDI, and DDO pins as the debug interface pins.
On-chip debug function is implemented by MINICUBE2 or the like, using the user resources, instead of the DCU.
Notes 1. This is a function which reads out memory contents during program execution.
Debug interface pins
Securement of user resources
Hardware break function
Software break
function
Real-time RAM monitor function
Dynamic memory modification (DMM)
function
Mask function
ROM security function
Hardware used
Trace function
Debug interrupt interface function
(DBINT)
Note 2
2. This is a function which rewrites RAM contents during program execution.
Internal ROM area
Internal RAM area
CHAPTER 32 ON-CHIP DEBUG FUNCTION
Note 1
Table 32-1. On-Chip Debug Function Features
DRST, DCK, DMS, DDI, DDO
Not required
2 points
4 points
2000 points
Available
Available
Reset, NMI, INTWDT2, HLDRQ,
WAIT
10-byte ID code authentication
NINICUBE, etc.
Not supported.
Not supported.
Debugging Using DCU
CHAPTER 32 ON-CHIP DEBUG FUNCTION
Required
4 points
2000 points
10-byte ID code authentication
• When UARTC0 is used
• When CSIF0 is used
• When CSIF3 is used
2 points
Available
Available
RESET pin
NINICUBE2, etc.
Not supported.
Not supported.
RXDC0, TXDC0
SIF0, SOF0, SCKF0, HS (P913)
SIF3, SOF3, SCKF3, HS (P913)
Debugging Without Using DCU
Page 1388 of 1509
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