UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 830
UPD70F3771GF-GAT-AX
Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3771GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(3) IIC flag registers 0 to 2 (IICF0 to IICF2)
The IICFn registers set the I
These registers can be read or written in 8-bit or 1-bit units. However, the STCFn and IICBSYn bits are read-only.
IICRSVn enables/disables the communication reservation function (see 19.14 Communication Reservation).
The initial value of the IICBSYn bit is set by using the STCENn bit (see 19.15 Cautions).
The IICRSVn and STCENn bits can be written only when operation of I
operation is enabled, IICFn can be read (n = 0 to 2).
Reset sets these registers to 00H.
2
C0n operation mode and indicate the I
2
C bus status.
2
C0n is disabled (IICCn.IICEn bit = 0). After
CHAPTER 19 I
Page 830 of 1509
2
C BUS
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