PIC16C55A-20E/SP Microchip Technology, PIC16C55A-20E/SP Datasheet - Page 48
![IC MCU OTP 512X12 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C55A-20E/SP
Manufacturer Part Number
PIC16C55A-20E/SP
Description
IC MCU OTP 512X12 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C55A-20E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
20
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
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9.2
The Watchdog Timer (WDT) is a free running on-chip
RC oscillator which does not require any external com-
ponents. This RC oscillator is separate from the RC
oscillator of the OSC1/CLKIN pin. That means that the
WDT will run even if the clock on the OSC1/CLKIN and
OSC2/CLKOUT pins have been stopped, for example,
by execution of a SLEEP instruction. During normal
operation or SLEEP, a WDT Reset or Wake-up Reset
generates a device RESET.
The TO bit (STATUS<4>) will be cleared upon a Watch-
dog Timer Reset (Section 6.3).
The WDT can be permanently disabled by program-
ming the configuration bit WDTE as a ’0’ (Section 9.1).
Refer to the PIC16C5X Programming Specifications
(Literature Number DS30190) to determine how to
access the configuration word.
9.2.1
An 8-bit counter is available as a prescaler for the
Timer0 module (Section 8.2), or as a postscaler for the
Watchdog Timer (WDT), respectively. For simplicity,
this counter is being referred to as “prescaler” through-
out this data sheet. Note that the prescaler may be
used by either the Timer0 module or the WDT, but not
FIGURE 9-1:
TABLE 9-1:
Legend: u = unchanged, - = unimplemented, read as '0'. Shaded cells not used by Watchdog Timer.
PIC16C5X
DS30453D-page 46
Address
Note:
N/A
Watchdog Timer (WDT)
WDT PERIOD
T0CS, T0SE, PSA, PS2:PS0 are bits in the
OPTION register.
OPTION
Name
SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
WDT Enable
EPROM Bit
WATCHDOG TIMER BLOCK DIAGRAM
Watchdog
Timer
From TMR0 Clock Source
Bit 7
—
Bit 6
—
1
0
Bit 5
Tosc
PSA
M
U
X
Preliminary
Bit 4
Tose
0
Bit 3
PSA
both. Thus, a prescaler assignment for the Timer0
module means that there is no prescaler for the WDT,
and vice-versa.
The PSA and PS<2:0> bits (OPTION<3:0>) determine
prescaler assignment and prescale ratio (Section 6.4).
The WDT has a nominal time-out period of 18 ms (with
no prescaler). If a longer time-out period is desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT (under software control) by writ-
ing to the OPTION register. Thus, time-out a period of
a nominal 2.3 seconds can be realized. These periods
vary with temperature, V
variations (see Device Characterization).
Under worst case conditions (V
= Max., WDT prescaler = 1:128), it may take several
seconds before a WDT time-out occurs.
9.2.2
The CLRWDT instruction clears the WDT and the pres-
caler, if assigned to the WDT, and prevents it from tim-
ing out and generating a device RESET.
The SLEEP instruction RESETS the WDT and the pres-
caler, if assigned to the WDT. This gives the maximum
SLEEP time before a WDT Wake-up Reset.
Time-out
8 - to - 1 MUX
WDT
MUX
Prescaler
Bit 2
PS2
1
WDT PROGRAMMING
CONSIDERATIONS
Bit 1
PS1
PSA
To TMR0
PS2:PS0
Bit 0
PS0
DD
2002 Microchip Technology Inc.
and part-to-part process
--11 1111 --11 1111
DD
Power-On
Value on
Reset
= Min., Temperature
WDT Reset
MCLR and
Value on
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