PIC16C66-04E/SP Microchip Technology, PIC16C66-04E/SP Datasheet - Page 39
![IC MCU OTP 8KX14 PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C66-04E/SP
Manufacturer Part Number
PIC16C66-04E/SP
Description
IC MCU OTP 8KX14 PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16LC62A-04SP.pdf
(337 pages)
4.PIC16C66-04SO.pdf
(6 pages)
Specifications of PIC16C66-04E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16LC62A-04SP PDF datasheet #3
- PIC16C66-04SO PDF datasheet #4
- Current page: 39 of 337
- Download datasheet (3Mb)
FIGURE 4-13: PIE1 REGISTER FOR PIC16C63/R63/66 (ADDRESS 8Ch)
FIGURE 4-14: PIE1 REGISTER FOR PIC16C64/64A/R64 (ADDRESS 8Ch)
1997 Microchip Technology Inc.
bit7
bit7
bit 7-6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
bit 7:
bit 6:
bit 5-4:
bit 3:
bit 2:
bit 1:
bit 0:
PSPIE
R/W-0
R/W-0
—
Reserved: Always maintain these bits clear.
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
PSPIE: Parallel Slave Port Read/Write Interrupt Enable bit
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
Reserved: Always maintain this bit clear.
Unimplemented: Read as '0'
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
R/W-0
R/W-0
—
—
R/W-0
RCIE
U-0
—
R/W-0
TXIE
U-0
—
SSPIE
SSPIE
R/W-0
R/W-0
CCP1IE
CCP1IE
R/W-0
R/W-0
TMR2IE
TMR2IE
R/W-0
R/W-0
TMR1IE
TMR1IE
R/W-0
R/W-0
bit0
bit0
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
R = Readable bit
read as ‘0’
read as ‘0’
PIC16C6X
DS30234D-page 39
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