ATMEGA163L-4PC Atmel, ATMEGA163L-4PC Datasheet - Page 43
ATMEGA163L-4PC
Manufacturer Part Number
ATMEGA163L-4PC
Description
IC AVR MCU 16K A/D 2.7V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA163-8AC.pdf
(187 pages)
Specifications of ATMEGA163L-4PC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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ATmega163(L)
clock period. The external clock signal is sampled on the rising edge of the internal CPU
clock.
The 16-bit Timer/Counter1 features both a high resolution and a high accuracy usage
with the lower prescaling opportunities. Similarly, the high prescaling opportunities
makes the Timer/Counter1 useful for lower speed functions or exact timing functions
with infrequent actions.
The Timer/Counter1 supports two Output Compare functions using the Output Compare
Register 1 A and B (OCR1A and OCR1B) as the data sources to be compared to the
Timer/Counter1 contents. The Output Compare functions includes optional clearing of
the counter on Compare A Match, and actions on the Output Compare pins on both
compare matches.
Timer/Counter1 can also be used as an 8-, 9-, or 10-bit Pulse Width Modulator (PWM).
In this mode the counter and the OCR1A/OCR1B Registers serve as a dual glitch-free
stand-alone PWM with centered pulses. Alternatively, the Timer/Counter1 can be con-
figured to operate at twice the speed in PWM mode, but without centered pulses. Refer
to page 48 for a detailed description of this function.
The Input Capture function of Timer/Counter1 provides a capture of the Timer/Counter1
contents to the Input Capture Register – ICR1, triggered by an external event on the
Input Capture Pin – ICP. The actual capture event settings are defined by the
Timer/Counter1 Control Register – TCCR1B. In addition, the Analog Comparator can be
set to trigger the Input Capture. Refer to the section, “The Analog Comparator” on page
102, for details on this. The ICP pin logic is shown in Figure 34.
Figure 34. ICP Pin Schematic Diagram
If the noise canceler function is enabled, the actual trigger condition for the capture
event is monitored over four samples, and all four must be equal to activate the Capture
Flag.
43
1142E–AVR–02/03
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