AT89C51RC-24JI Atmel, AT89C51RC-24JI Datasheet - Page 7
![IC MICRO CTRL 24MHZ 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51RC-24JI
Manufacturer Part Number
AT89C51RC-24JI
Description
IC MICRO CTRL 24MHZ 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RC-24PU.pdf
(36 pages)
Specifications of AT89C51RC-24JI
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
AT89C51RC24JI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
AT89C51RC
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will in general return random data, and
write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bits will
always be 0.
Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in
Table 5-
2) and T2MOD (shown in
Table 13-1
and
Table
5-4) for Timer 2. The register pair (RCAP2H,
RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-
reload mode.
Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can
be set for each of the six interrupt sources in the IP register.
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory,
two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-
83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1.
The user should always initialize the DPS bit to the appropriate value before accessing the
respective Data Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF
is set to “1” during power up. It can be set and reset under software control and is not affected by
reset.
7
1920D–MICRO–6/08