AT89C5132-ROTIL Atmel, AT89C5132-ROTIL Datasheet - Page 22
![IC 8051 MCU FLASH 64K USB 80TQFP](/photos/12/13/121358/313-80-tqfp_sml.jpg)
AT89C5132-ROTIL
Manufacturer Part Number
AT89C5132-ROTIL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheets
1.AT89C5132-ROTUL.pdf
(182 pages)
2.AT89C5132-ROTUL.pdf
(38 pages)
3.AT89C5132-ROTIL.pdf
(33 pages)
Specifications of AT89C5132-ROTIL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Manufacturer
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8. Data Memory
Figure 8-1.
8.1
8.1.1
22
Internal Space
AT89C5132
Lower 128 Bytes RAM
7FFh
Internal and External Data Memory Organization
00h
Internal ERAM
EXTRAM = 0
2K Bytes
The AT89C5132 provides data memory access in two different spaces:
1. The internal space mapped in three separate segments:
2. The external space.
A fourth internal segment is available but dedicated to Special Function Registers, SFRs,
(addresses 80h to FFh) accessible by direct addressing mode. For information on this segment,
refer to the section “Special Function Registers”, page 29.
Figure 8-1 shows the internal and external data memory spaces organization.
The lower 128 Bytes of RAM (see Figure 8-2) are accessible from address 00h to 7Fh using
direct or indirect addressing modes. The lowest 32 Bytes are grouped into 4 banks of 8 registers
(R0 to R7). Two Bits RS0 and RS1 in PSW register (see Table 13) select which bank is in use
according to Table 10. This allows more efficient use of code space, since register instructions
are shorter than instructions that use direct addressing, and can be used for context switching in
interrupt service routines.
Table 10. Register Bank Selection
–
–
–
The lower 128 Bytes RAM segment
The upper 128 Bytes RAM segment
The expanded 2048 Bytes RAM segment
RS1
0
0
1
1
FFh
7Fh
80h
00h
indirect addressing
direct or indirect
Internal RAM
Internal RAM
addressing
128 Bytes
128 Bytes
Upper
Lower
RS0
0
1
0
1
FFh
80h
direct addressing
Description
Register bank 0 from 00h to 07h
Register bank 1 from 08h to 0Fh
Register bank 2 from 10h to 17h
Register bank 3 from 18h to 1Fh
Registers
Function
Special
FFFFh
0800h
0000h
External XRAM
EXTRAM = 1
64K Bytes
4173E–USB–09/07
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