AT89C5132-ROTIL Atmel, AT89C5132-ROTIL Datasheet - Page 23
![IC 8051 MCU FLASH 64K USB 80TQFP](/photos/12/13/121358/313-80-tqfp_sml.jpg)
AT89C5132-ROTIL
Manufacturer Part Number
AT89C5132-ROTIL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheets
1.AT89C5132-ROTUL.pdf
(182 pages)
2.AT89C5132-ROTUL.pdf
(38 pages)
3.AT89C5132-ROTIL.pdf
(33 pages)
Specifications of AT89C5132-ROTIL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Part Number
Manufacturer
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8.1.2
8.1.3
8.2
8.2.1
4173E–USB–09/07
External Space
Upper 128 Bytes RAM
Expanded RAM
Memory Interface
The next 16 Bytes above the register banks form a block of bit-addressable memory space. The
C51 instruction set includes a wide selection of single-bit instructions, and the 128 Bits in this
area can be directly addressed by these instructions. The bit addresses in this area are 00h to
7Fh.
Figure 8-2.
The upper 128 Bytes of RAM are accessible from address 80h to FFh using only indirect
addressing mode.
The on-chip 2K Bytes of expanded RAM (ERAM) are accessible from address 0000h to 07FFh
using indirect addressing mode through MOVX instructions. In this address range, EXTRAM bit
in AUXR register (see Table 14) is used to select the ERAM (default) or the XRAM. As shown in
Figure 8-1 when EXTRAM = 0, the ERAM is selected and when EXTRAM = 1, the XRAM is
selected,
The ERAM memory can be resized using XRS1:0 Bits in AUXR register to dynamically increase
external access to the XRAM space. Table 11 details the selected ERAM size and address
range.
Table 11. ERAM Size Selection
Note:
The external memory interface comprises the external bus (port 0 and port 2) as well as the bus
control signals (RD, WR, and ALE).
XRS1
Lower 128 Bytes RAM, Upper 128 Bytes RAM, and expanded RAM are made of volatile memory
cells. This means that the RAM content is indeterminate after power-up and must then be initial-
ized properly.
0
0
1
1
See “External Space” on page 23.
Lower 128 Bytes Internal RAM Organization
XRS0
0
1
0
1
30h
20h
18h
10h
08h
00h
ERAM Size
256 Bytes
512 Bytes
1K Byte
2K Bytes
7Fh
2Fh
1Fh
0Fh
17h
07h
Bit-Addressable Space
(Bit Addresses 0 - 7Fh)
4 Banks of
8 Registers
R0 - R7
Address
0 to 00FFh
0 to 01FFh
0 to 03FFh
0 to 07FFh
AT89C5132
23
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