AT89C51ED2-3CSIM Atmel, AT89C51ED2-3CSIM Datasheet - Page 115

IC 8051 MCU FLASH 64K 40DIP

AT89C51ED2-3CSIM

Manufacturer Part Number
AT89C51ED2-3CSIM
Description
IC 8051 MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51ED2-3CSIM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
8 bit
Data Ram Size
64 KB
Interface Type
SPI, UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3 x 16 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51ED2-3CSIM
Manufacturer:
ATMEL
Quantity:
77 760
Part Number:
AT89C51ED2-3CSIM
Manufacturer:
SSG
Quantity:
100
T
V
V
Notes:
4235K–8051–05/08
A
CC
CC
Symbol
I
VPFDM
VPFDP
= -40°C to +85°C; V
CCWRITE
I
t
Vhyst
dV/dt
I
CCIDLE
V
R
WRITE
CCOP
Vcc
C
=2.7V to 5.5V and F = 0 to 40 MHz (both internal and external code execution)
=4.5V to 5.5V and F = 0 to 60 MHz (internal code execution only) (Continued)
I
I
I
I
OH1
RST
PD
TL
IL
LI
IO
1. Operating I
2. Idle I
3. Power-down I
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the V
5. Typical values are based on a limited number of samples and are not guaranteed. The values listed are at room temperature
6. Under steady state (non-transient) conditions, I
V
(see
0.5V; XTAL2 N.C; Port 0 = V
ure
and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100 pF), the noise pulse on the ALE line may exceed
0.45V with maxi V
and 5V.
Maximum I
Maximum I
Parameter
Output High Voltage, port 0, ALE, PSEN
RST Pull-down Resistor
Logical 0 Input Current ports 1, 2, 3, 4 and 5
Input Leakage Current
Logical 1 to 0 Transition Current, ports 1, 2, 3, 4
Capacitance of I/O Buffer
Power-down Current
Power Supply Current on normal mode
Power Supply Current on idle mode
Power Supply Current on flash or EEdata write
Flash or EEdata programming time
Internal POR/PFD VPFDP threshold
Internal POR/PFD VPFDM threshold
Internal POR/PFD Hysteresys
Maximum Vcc Power supply slew rate
SS
25-3).
+ 0.5V, V
CC
Figure
is measured with all output pins disconnected; XTAL1 driven with T
OL
OL
CC
25-1).
SS
IH
CC
per port pin: 10 mA
per 8-bit port:
is measured with all output pins disconnected; XTAL1 driven with T
= V
= 0V;
is measured with all output pins disconnected; EA = V
OL
CC
peak 0.6V. A Schmitt Trigger use is not necessary.
- 0.5V; XTAL2 N.C.; EA = RST = Port 0 = V
CC
; EA = RST = V
(7)
SS
OL
V
V
V
0.9 V
(see
CC
CC
CC
must be externally limited as follows:
2.25
2.15
Min
50
70
7
- 0.3
- 0.7
- 1.5
CC
Figure
25-2).
200
2.35
Typ
140
2.5
75
(5)
CC
. I
CC
0.8 x Frequency (MHz) + 15
0.4 x Frequency (MHz) + 5
0.3 x Frequency (MHz) + 5
SS
would be slightly higher if a crystal oscillator used
, PORT 0 = V
CLCH
, T
-650
Max
2.69
2.62
250
±10
150
250
-50
0.1
CLCH
10
17
CHCL
AT89C51RD2/ED2
, T
CC
= 5 ns, V
CHCL
; XTAL2 NC.; RST = V
= 5 ns (see Figure 25-4), V
IL
= V
Unit
V/µs
mA
mA
mA
mV
kΩ
µA
µA
µA
µA
ms
pF
V
V
V
V
V
V
OLS
SS
+ 0.5V, V
of ALE and Ports 1
Test Conditions
V
I
I
I
V
I
V
0.45V < V
V
F
T
2.7 < V
V
V
V
2.7 < V
OH
OH
OH
OH
A
CC
CC
IN
IN
C
CC
CC
CC
= 25°C
= 3 MHz
= -200 µA
= -3.2 mA
= -7.0 mA
= -10 µA
= 0.45V
= 2.0V
= 5V ± 10%
= 2.7V to 5.5V
= 5.5V
= 5.5V
= 5.5V
CC <
CC <
SS
IH
IN
(see
(1)
(2)
5.5V
5.5V
= V
< V
CC
CC
Fig-
(3)
115
IL
=
-

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