AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 358

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

If an equal condition on RC induces both trigger condition and stop counter, the trigger will have no effect.
• CPCDIS: Compare RC Disables Clock
0: The counter clock is not disabled when an equal condition on RC is detected.
1: The counter clock is disabled and the counter stopped when an equal condition on RC is detected.
If the counter clock is disabled, it can be enabled only by asserting CLKEN, bit [1] of the control register.
• EEVTEDG[1:0]: External Event Edge
These two bits activate one of four possible external event modes. The external event source is selected by EEVT[1:0] of
the mode register.
When an external event is generated, five events occur:
• EEVT[1:0]: External Event
These bits select an external event source among four pins:
If TIOBx is selected, the mode is in single waveform mode (see
TIOBx as an input. The following bits are disabled:
If an external clock is selected, the mode is in dual waveform mode. TIOAx and TIOBx are used as outputs.
358
– The ETRGS flag is set in the status register.
– If enabled, ETRGS interrupt is generated.
– It can reset and start the counter at the next valid counter clock edge if ENETRG (bit [12] of the mode register)
– TIOAx pin can be set, clear, toggle or unchanged following AEEVT[1:0] of the mode register.
– TIOBx pin can be set, clear, toggle or unchanged following BEEVT[1:0] of the mode register.
– BSWTRG[1:0] of the mode register
– BEEVT[1:0] of the mode register
– BCPC[1:0] of the mode register
– BCPB[1:0] of the mode register
– Compare register B
is high.
AT91SAM7A1
0
0
1
1
0
0
1
1
EEVTEDG[1:0]
EEVT[1:0]
0
1
0
1
0
1
0
1
Edge
External Trigger
None
Rising edge
Falling edge
Each edge
TIOBx
XC0
XC1
XC2
Figure 26-16 on page
355). TIOAx is used as an output and
6048B–ATARM–29-Jun-06