PIC18F4580T-I/ML Microchip Technology, PIC18F4580T-I/ML Datasheet - Page 354
PIC18F4580T-I/ML
Manufacturer Part Number
PIC18F4580T-I/ML
Description
IC PIC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18F4480-IPT.pdf
(8 pages)
5.PIC18F4480-IPT.pdf
(6 pages)
6.PIC18F4480-IPT.pdf
(6 pages)
Specifications of PIC18F4580T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18F4480-IPT PDF datasheet #4
- PIC18F4480-IPT PDF datasheet #5
- PIC18F4480-IPT PDF datasheet #6
- Current page: 354 of 490
- Download datasheet (9Mb)
PIC18F2480/2580/4480/4580
REGISTER 25-6:
REGISTER 25-7:
DS39637D-page 354
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-0
R/C-1
CPD
U-0
—
Unimplemented in PIC18FX480 devices; maintain this bit set.
Unimplemented: Read as ‘0’
CP3: Code Protection bit
1 = Block 3 (006000-007FFFh) not code-protected
0 = Block 3 (006000-007FFFh) code-protected
CP2: Code Protection bit
1 = Block 2 (004000-005FFFh) not code-protected
0 = Block 2 (004000-005FFFh) code-protected
CP1: Code Protection bit
1 = Block 1 (002000-003FFFh) not code-protected
0 = Block 1 (002000-003FFFh) code-protected
CP0: Code Protection bit
1 = Block 0 (000800-001FFFh) not code-protected
0 = Block 0 (000800-001FFFh) code-protected
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM not code-protected
0 = Data EEPROM code-protected
CPB: Boot Block Code Protection bit
1 = Boot Block (000000-0007FFh) not code-protected
0 = Boot Block (000000-0007FFh) code-protected
Unimplemented: Read as ‘0’
R/C-1
CPB
U-0
—
CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
C = Clearable bit
C = Clearable bit
U-0
U-0
—
—
(1)
(1)
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
CP3
R/C-1
U-0
—
(1)
CP2
R/C-1
U-0
—
(1)
© 2009 Microchip Technology Inc.
R/C-1
CP1
U-0
—
R/C-1
CP0
U-0
—
bit 0
bit 0
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