ATMEGA88-20MU Atmel, ATMEGA88-20MU Datasheet - Page 20

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ATMEGA88-20MU

Manufacturer Part Number
ATMEGA88-20MU
Description
IC AVR MCU 8K 20MHZ 5V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA8x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRTS2080A, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
20 MIPS
Eeprom Memory
512 Bytes
Input Output
23
Interface
SPI/TWI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
32-pin MLF
Programmable Memory
8K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
No. Of Timers
3
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.5
7.5.1
20
I/O Memory
ATmega48/88/168
General Purpose I/O Registers
An EEPROM data corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the EEPROM requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage is too low.
EEPROM data corruption can easily be avoided by following this design recommendation:
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can
be done by enabling the internal Brown-out Detector (BOD). If the detection level of the internal
BOD does not match the needed detection level, an external low V
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
The I/O space definition of the ATmega48/88/168 is shown in
All ATmega48/88/168 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The ATmega48/88/168 is a
complex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega48/88/168 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables and
Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
“Register Summary” on page
CC
reset Protection circuit can
2545S–AVR–07/10
342.

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