ATMEGA88-20PU Atmel, ATMEGA88-20PU Datasheet - Page 367

IC AVR MCU 8K 20MHZ 5V 28DIP

ATMEGA88-20PU

Manufacturer Part Number
ATMEGA88-20PU
Description
IC AVR MCU 8K 20MHZ 5V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRTS2080A, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
Package
28PDIP
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
35.17 Rev. 2545C-04/04
35.18 Rev. 2545B-01/04
2545S–AVR–07/10
1.
2.
3.
4.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
Added section
Updated C code examples containing old IAR syntax.
Speed Grades changed: 12 MHz to 10 MHz and 24 MHz to 20 MHz
Updated
Updated
Updated
Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption
Estimates in
Updated
value.
of the PRR bits to 2-wire, Timer/Counters, USART, Analog Comparator and ADC
sections.
Updated
Updated
Extra Compare Match Interrupt OCF2B added to features in section
Timer/Counter2 with PWM and Asynchronous Operation” on page 139
Updated
page 285 to 287 and
284. Fixed typo in
Updated whole
Added item 2 to 5 in
Renamed the following bits:
- SPMEN to SELFPRGEN
- PSR2 to PSRASY
- PSR10 to PSRSYNC
- Watchdog Reset to Watchdog System Reset
Updated BLBSET description in
Status Register” on page
“Speed Grades” on page
“Ordering Information” on page
“Errata ATmega88” on page
“Watchdog Timer” on page
Figure 15-2 on page 129
Table 9-1 on page
“Stack Pointer” on page 12
35.“Features” on page
“Power Reduction Register” on page 40
“Typical Characteristics” on page
Table 12-1 on page
“Errata ATmega48” on page
Table 23-1 on page
282.
38,
Table 23-5 on page
“SPMCSR – Store Program Memory Control and
and
304.
1.
48.
with RAMEND as recommended Stack Pointer
359.
66.
Table 15-3 on page
349.
248. Added note 2 to
314.
356.
258,
ATmega48/88/168
and a note regarding the use
Table 27-4
130.
Table 27-1 on page
to
Table 27-7
“8-bit
367
on

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