ATMEGA88V-10MU Atmel, ATMEGA88V-10MU Datasheet - Page 11

IC AVR MCU 8K 10MHZ 1.8V 32-QFN

ATMEGA88V-10MU

Manufacturer Part Number
ATMEGA88V-10MU
Description
IC AVR MCU 8K 10MHZ 1.8V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART, Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3 bit
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
10MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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6.5
2545S–AVR–07/10
General Purpose Register File
• Bit 0 – C: Carry Flag
The Carry Flag C indicates a carry in an arithmetic or logic operation. See the “Instruction Set
Description” for detailed information.
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve
the required performance and flexibility, the following input/output schemes are supported by the
Register File:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
Figure 6-2
Figure 6-2.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
As shown in
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y- and Z-pointer registers can be set to index any register in the file.
Registers
shows the structure of the 32 general purpose working registers in the CPU.
Purpose
Working
General
Figure
AVR CPU General Purpose Working Registers
6-2, each register is also assigned a data memory address, mapping them
7
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
0
Addr.
0x0D
0x0E
0x0F
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x00
0x01
0x02
0x10
0x11
ATmega48/88/168
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
11

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