ATMEGA88PA-MU Atmel, ATMEGA88PA-MU Datasheet - Page 51

• Manufacturer Part Number: ATMEGA88PA-MU
• Description: MCU AVR 8K ISP FLASH MEM 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA88PA-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Controller Family/series: AVR MEGA
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 23
• Interface Type: SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.8
10.8.1
10.8.2
8271C–AVR–08/10
Watchdog Timer
Features
Overview
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
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ATmega48A/48PA/88A/88PA/168A/168PA/328/328P has an Enhanced Watchdog Timer
(WDT). The WDT is a timer counting cycles of a separate on-chip 128 kHz oscillator. The WDT
gives an interrupt or a system reset when the counter reaches a given time-out value. In normal
operation mode, it is required that the system uses the WDR - Watchdog Timer Reset - instruc-
tion to restart the counter before the time-out value is reached. If the system doesn't restart the
counter, an interrupt or system reset will be issued.
Figure 10-7. Watchdog Timer
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Clocked from separate On-chip Oscillator
3 Operating modes
Selectable Time-out period from 16ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
WATCHDOG
RESET
OSCILLATOR
128kHz
WDIE
WDIF
WDE
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
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