ATMEGA88PA-MU Atmel, ATMEGA88PA-MU Datasheet - Page 67

• Manufacturer Part Number: ATMEGA88PA-MU
• Description: MCU AVR 8K ISP FLASH MEM 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA88PA-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Controller Family/series: AVR MEGA
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 23
• Interface Type: SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 11-6.
Notes:
8271C–AVR–08/10
VectorNo.
21
22
23
24
25
26
1. When the BOOTRST Fuse is programmed, the device will jump to the Boot Loader address at reset, see
2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot Flash Section. The address of
port – Read-While-Write Self-Programming” on page
each Interrupt Vector will then be the address in this table added to the start address of the Boot Flash Section.
Reset and Interrupt Vectors in ATmega328 and ATmega328P (Continued)
Address
Program
0x002A
0x002C
0x002E
0x0028
0x0030
0x0032
(2)
Table 11-7 on page 67
tions of BOOTRST and IVSEL settings. If the program never enables an interrupt source, the
Interrupt Vectors are not used, and regular program code can be placed at these locations. This
is also the case if the Reset Vector is in the Application section while the Interrupt Vectors are in
the Boot section or vice versa.
Table 11-7.
Note:
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
ATmega328/328P is:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
BOOTRST
Address Labels Code
0x0000
0x0002
0x0004
0x0006
0x0008
0x000A
0x000C
0x000E
0x0010
0x0012
0x0014
0x0016
0x0018
1
1
0
0
Source
USART, TX
ADC
EE READY
ANALOG COMP
TWI
SPM READY
1. The Boot Reset Address is shown in
means unprogrammed while “0” means programmed.
Reset and Interrupt Vectors Placement in ATmega328 and ATmega328P
IVSEL
0
1
0
1
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
shows reset and Interrupt Vectors placement for the various combina-
Reset Address
0x000
0x000
Boot Reset Address
Boot Reset Address
Interrupt Definition
USART, Tx Complete
ADC Conversion Complete
EEPROM Ready
Analog Comparator
2-wire Serial Interface
Store Program Memory Ready
RESET
EXT_INT0
EXT_INT1
PCINT0
PCINT1
PCINT2
WDT
TIM2_COMPA
TIM2_COMPB
TIM2_OVF
TIM1_CAPT
TIM1_COMPA
TIM1_COMPB
279.
Table 26-7 on page
Comments
; Reset Handler
; IRQ0 Handler
; IRQ1 Handler
; PCINT0 Handler
; PCINT1 Handler
; PCINT2 Handler
; Watchdog Timer Handler
; Timer2 Compare A Handler
; Timer2 Compare B Handler
; Timer2 Overflow Handler
; Timer1 Capture Handler
; Timer1 Compare A Handler
; Timer1 Compare B Handler
Interrupt Vectors Start Address
0x002
Boot Reset Address + 0x0002
0x002
Boot Reset Address + 0x0002
291. For the BOOTRST Fuse “1”
”Boot Loader Sup-
(1)
67