AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 727

• Manufacturer Part Number: AT91SAM9261-CJ-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261-CJ-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

6062M–ATARM–23-Mar-09
Doc. Rev.
6062H
Date
13-Nov-07
Comments
Overview:
Table 10-4, “Multiplexing on PIO Controller C,” on page
PCO - PC7 power supplies are VDDIOP not VDDIOM.
Section 8.1.2 ”Boot
Section 8.1.2.2 ”BMS = 0, Boot on External
Section 5.1 ”Power
added.
Table 10-3, “Multiplexing on PIO Controller B,” on page
Figure 9-3, “Power Management Controller Block Diagram,” on page
controller representation, the divider has been updated.
Table 4-1 on page
PCO - PC7, PC8 - PC11, PC14 - PC15 power supplies are VDDIOP not VDDIOM.
Boot Program
Section 13.1
Section 13.7 ”NANDFlash
Figure 13-3 ”LDR
Section 13.11 ”Hardware and Software
BUS Matrix:
Section 19.5.4 ”EBI Chip Select Assignment Register”
VDDIOM power supply.
PMC
Section 24. ”Clock Generator”
Section 24.4.2 ”Divider and Phase Lock Loop
Section 25.7 ”Programming
RSTC
Figure 14-1 ”Reset Controller Block Diagram”
Section 14.3.2 ”NRST
SHDW
Section 18.2 ”Block
Table 18-2, “Register Mapping,”
Electrical/Mechanical Characteristics
Section 39.2 ”DC
Section 40. ”AT91SAM9261 Mechanical
Table 39-8, “32 kHz Oscillator Characteristics”
Section 39.5.2 ”32 kHz Crystal
Section 39.4.2 ”Master Clock
Table 38-2, “DC Characteristics,”
Errata:
The following have been added.
Section 42.2.3.1 ”Boot ROM: NAND Flash Boot is not Functional”
”Description”, updated.
Characteristics”, removed reference to junction temperature
Opcode”, updated.
10,
Supplies”, startup voltage slope requirements for VDDCORE and VDDBU
Strategies”, removed sentence pertaining to “remap”
Diagram”, updated
Manager”, the brownout manager figure has been removed
Boot”, added to Boot Program.
Sequence”, 2nd sentence in step 3 and step 4 added.
Characteristics”, added to datasheet
removed reference to RC Oscillator
Characteristics”, added to datasheet
updated
Typical values assigned.
Constraints”, updated
Characteristics”, “Thermal Considerations” removed
Memory”, “NANDFlash Boot“ added to list.
Programming”, last sentence added.
There is one block diagram.
V
DDOSC
AT91SAM9261 Preliminary
EBI_DBPUCD: ....bits pulled up to the
= 1.2V
32, Note added to “PB3” comments
33,
25, in the master memory
Change
Request
Ref.
5042
5027
rfo
4965
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4835
4241
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rfo
4452
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4467
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