Z8F1621AN020EC Zilog, Z8F1621AN020EC Datasheet - Page 126
Z8F1621AN020EC
Manufacturer Part Number
Z8F1621AN020EC
Description
IC ENCORE MCU FLASH 16K 44LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F1621AN020EC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
44-LQFP
Processor Series
Z8F162x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
31
Number Of Timers
16 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F64200100KITG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
Other names
269-3253
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®
Z8 Encore! XP
F64XX Series
Product Specification
112
PE—Parity Error
This bit indicates that a parity error has occurred. Reading the UART Receive Data regis-
ter clears this bit.
0 = No parity error occurred.
1 = A parity error occurred.
OE—Overrun Error
This bit indicates that an overrun error has occurred. An overrun occurs when new data is
received and the UART Receive Data register has not been read. If the RDA bit is reset to
0, then reading the UART Receive Data register clears this bit.
0 = No overrun error occurred.
1 = An overrun error occurred.
FE—Framing Error
This bit indicates that a framing error (no Stop bit following data reception) was detected.
Reading the UART Receive Data register clears this bit.
0 = No framing error occurred.
1 = A framing error occurred.
BRKD—Break Detect
This bit indicates that a break occurred. If the data bits, parity/multiprocessor bit, and Stop
bit(s) are all zeros then this bit is set to 1. Reading the UART Receive Data register clears
this bit.
0 = No break occurred.
1 = A break occurred.
TDRE—Transmitter Data Register Empty
This bit indicates that the UART Transmit Data register is empty and ready for additional
data. Writing to the UART Transmit Data register resets this bit.
0 = Do not write to the UART Transmit Data register.
1 = The UART Transmit Data register is ready to receive an additional byte to be transmit-
ted.
TXE—Transmitter Empty
This bit indicates that the transmit shift register is empty and character transmission is fin-
ished.
0 = Data is currently transmitting.
1 = Transmission is complete.
CTS—CTS signal
When this bit is read it returns the level of the CTS signal.
UART Status 1 Register
This register contains multiprocessor control and status bits.
PS019921-0308
UART
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