STR736FV2T7 STMicroelectronics, STR736FV2T7 Datasheet
STR736FV2T7
Specifications of STR736FV2T7
Available stocks
Related parts for STR736FV2T7
STR736FV2T7 Summary of contents
Page 1
Features ■ Core – ARM7TDMI 32-bit RISC CPU – 32 MIPS @ 36 MHz ■ Memories – 256 Kbytes Flash program memory (10,000 cycles endurance, data retention 20 years @ 85° C) – 16 Kbytes RAM ■ Clock, ...
Page 2
Contents Contents 1 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
STR73xFxx 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
... ARM core and is therefore compatible with all ARM tools and software. Extensive tools support STMicroelectronics’ 32-bit, ARM core-based microcontrollers are supported by a complete range of high-end and low-cost development tools to meet the needs of application developers. This extensive line of hardware/software tools includes starter kits and complete development packages all tailored for ST’ ...
Page 5
STR73xFxx 2 Overview Table 2. Product overview Features STR730FZx Flash memory - bytes 128K RAM - bytes Peripheral functions 32 wake-up lines, 16 ADC CAN peripherals Operating voltage Operating temperature Packages Package choice: reduced pin-count TQFP100 or feature-rich 144-pin TQFP ...
Page 6
Overview Flexible clock control Two clock sources are used to drive the microcontroller, a main clock driven by an external crystal or ceramic resonator and an internal backup RC oscillator that operates at 2 MHz or 32 kHz. The embedded ...
Page 7
STR73xFxx clock/calendar/alarm function. When the STR73xF is in LPWFI mode the RTC keeps running, powered by the low power voltage regulator. UARTs The 4 UARTs allow full duplex, asynchronous, communications with external devices with independently programmable TX and RX baud ...
Page 8
Block diagram 3 Block diagram Figure 1. STR730F/STR735F block diagram RSTIN JTDI JTCK JTMS JTRST JTDO V18 VDD VSS VDDA VSSA XTAL1 XTAL2 122 ports *CAN peripherals not available on ...
Page 9
STR73xFxx Figure 2. STR731F/STR736 block diagram RSTIN JTDI JTCK JTMS JTRST JTDO V18 VDD VSS VDDA VSSA XTAL1 XTAL2 ports *CAN peripherals not available on STR736F. PRCCU/PLL ARM7TDMI CPU ...
Page 10
Block diagram 3.1 Related documentation Available from www.arm.com: ARM7TDMI technical reference manual Available from http://www.st.com: STR73x reference manual (RM0001) STR7 Flash programming reference manual STR73x software library user manual For a list of related application notes refer to http://www.st.com. 10/52 ...
Page 11
STR73xFxx 3.2 Pin description 3.2.1 STR730F/STR735F (TQFP144) Figure 3. STR730F/STR735F pin configuration (top view) OCMPB2 / P0.0 OCMPA2 / P0.1 ICAPA2 / P0.2 ICAPB2 / P0.3 OCMPA5 / P0.4 OCMPB5 / P0.5 ICAPA5 / P0.6 ICAPB5 / P0.7 OCMPA6 / ...
Page 12
Block diagram 3.2.2 STR730F/STR735F (LFBGA144) Table 3. STR730F/STR735F LFBGA ball connections Ball Name Ball A1 P0.0 / OCMPB2 B1 A2 P6.10 / WUP8 B2 A3 P6.9 / TDO0 B3 A4 P6.12 / MOSI0 B4 A5 P6.6 / WUP6 B5 A6 ...
Page 13
STR73xFxx 3.2.3 STR731F/STR736F (TQFP100) Figure 4. STR731F/STR736F pin configuration (top view) OCMPB2 / P0.0 OCMPA2 / P0.1 ICAPA2 / P0.2 ICAPB2 / P0.3 OCMPA5 / P0.4 OCMPB5 / P0.5 ICAPA5 / P0.6 ICAPA3 / P0.12 ICAPB3 / P0.13 OCMPB3 / ...
Page 14
Block diagram Legend / Abbreviations for Type: In/Output level: Port and control configuration: Input: Output: Interrupts: The reset state (during and just after the reset) of the I/O ports is input floating (Input tristate TTL mode). To avoid excess power ...
Page 15
STR73xFxx Table 4. STR73xF pin description Pin n° Pin name P0.14/OCMPB P0.15/OCMPA3 I P1.0/OCMPA4 P1.1/OCMPB4 P1.2/ICAPB4 P1.3/ICAPA4 ...
Page 16
Block diagram Table 4. STR73xF pin description Pin n° Pin name XTAL1 XTAL2 P2.8/TDO1/ N2RX P2.9/RDI1/CAN ...
Page 17
STR73xFxx Table 4. STR73xF pin description Pin n° Pin name 73 M12 51 P3.6/AIN6 74 L11 52 P3.7/AIN7 75 K11 53 V SSA 76 K10 54 V DDA 77 J12 55 P3.8/AIN8 78 J11 56 P3.9/AIN9 79 L12 57 P3.10/AIN10 ...
Page 18
Block diagram Table 4. STR73xF pin description Pin n° Pin name 97 F9 P4.3/ICAPB8 98 F8 P4.4/CAN2TX 99 E12 P4.5/CAN2RX 100 E11 72 P4.6/SCL1 101 C12 73 P4.7/SDA1 102 B12 P4.8/OCMPA8 103 E10 P4.9/ICAPB6 P4.10/ICAPA6/I 104 E9 74 CAPB5 P4.11/OCMPB ...
Page 19
STR73xFxx Table 4. STR73xF pin description Pin n° Pin name 119 B8 84 P5.9/PWM5 120 C8 85 P5.10/RDI2 121 A12 86 P5.11/TDO2 122 D8 87 P5.12 123 E8 P5.13 124 B7 P5.14 125 A7 P5.15 126 ...
Page 20
Block diagram 3.3 Memory mapping Figure 5 shows the various memory configurations of the STR73xF system. The system memory map (from 0x0000_0000 to 0xFFFF_FFFF) is shown on the left part of the figure, the right part shows maps of the ...
Page 21
STR73xFxx 4 Electrical parameters 4.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 4.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage ...
Page 22
Electrical parameters 4.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure ...
Page 23
STR73xFxx Table 7. Thermal characteristics Symbol T STG T J Ratings Storage temperature range Maximum junction temperature (see Electrical parameters Value -55 to +150 Section 5.2: Thermal characteristics on page 48) Unit °C 23/52 ...
Page 24
Electrical parameters 4.3 Operating conditions Subject to general operating conditions for V Table 8. General operating conditions Symbol Internal CPU and system f MCLK clock frequency Standard Operating V DD Voltage Operating analog reference V voltage with respect to DDA ...
Page 25
STR73xFxx 4.3.1 Supply current characteristics The current consumption is measured as described in Total current consumption The MCU is placed under the following conditions: ● All I/O pins in input mode with a static value at V ● All peripherals ...
Page 26
Electrical parameters Figure 8. STOP I vs. VDD DD 300 250 200 150 100 50 0 3.5 4 4.5 5 5.5 Vdd (V) Figure 10. WFI I vs 8.0 7.5 7.0 6.5 6.0 5.5 3.5 4 4.5 ...
Page 27
STR73xFxx Typical application current consumption Table 11. Typical consumption in Run mode at 25°C and 85° 5 oscillator off, DD PLL on, RTC enabled, 1 Timer (TIM) running, and ADC running in scan mode. Table 12. ...
Page 28
Electrical parameters On-chip peripherals Table 13. Peripheral current consumption at T Symbol I RC (backup oscillator) supply current DD(RC) I TIM timer supply current DD(TIM) I BSPI supply current DD(BSPI) I UART supply current DD(UART) I I2C supply current DD(I2C) ...
Page 29
STR73xFxx 4.3.2 Clock and timing characteristics Crystal / ceramic resonator oscillator The STR73xF can operate with a crystal oscillator or resonator clock source. simple model of the internal oscillator driver as well as example of connection for an oscillator or ...
Page 30
Electrical parameters Main oscillator characteristics ± 10% DD Table 14. Main oscillator characteristics Symbol Parameter f Oscillator frequency OSC Oscillator g m transconductance 1) V Oscillation amplitude OSC Oscillator operating point 1) t ...
Page 31
STR73xFxx Table 14. Main oscillator characteristics (continued) Symbol Parameter 1) R Feedback resistor F 1. Min and max values are guaranteed by characterization, not tested in production represents the total capacitance between XTAL1 and XTAL2, including the shunt ...
Page 32
Electrical parameters RC/backup oscillator characteristics , ± 10 Table 15. RC oscillator characteristics Symbol f RC frequency high frequency RCHF f RC low frequency RCLF high frequency stability ...
Page 33
STR73xFxx PLL electrical characteristics , ± 10 Table 16. PLL characteristics Symbol (1) f PLL reference clock PLLIN f PLL output clock PLLOUT f System clock MCLK PLL free running (2) f FREE frequency ...
Page 34
Electrical parameters 4.3.3 Memory characteristics Flash memory Table 18. Flash memory characteristics Symbol t Word program (32-bit Double word program(64-bit) DWP t Bank program (64 K) BP64 t Bank program (128 K) BP128 t Bank program (256 K) ...
Page 35
STR73xFxx 4.3.4 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by two ...
Page 36
Electrical parameters Electromagnetic interference (EMI) Based on a simple application running on the product (toggling 2 LEDs through the I/O ports), the product is monitored in terms of emission. This emission test is in line with the norm SAE J ...
Page 37
... Static latch-up class DLU Dynamic latch-up class 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the JEDEC criteria (international standard). ...
Page 38
Electrical parameters 4.3.5 I/O port pin characteristics General characteristics Subject to general operating conditions for V Table 23. I/O static characteristics Symbol V Input low level voltage IL V Input high level voltage IH I Injected current on any I/O ...
Page 39
STR73xFxx Output driving current Subject to general operating conditions for Table 24. Output driving current I/O Type Symbol V OL Standard V OH Med Current V (JTDO) OH High V OL Current V P6 The I ...
Page 40
Electrical parameters Figure 15. V JTDO pin 5.10 5.00 4.90 4.80 4.70 Ta -45°C Ta 25°C Ta 90°C 4.60 Ta 110°C 4. Ioh (mA) Figure 17. V P6.0 pin 5.10 ...
Page 41
STR73xFxx NRSTIN pin The NRSTIN pin input driver is CMOS. A permanent pull-up is present which is the same as R (see : General characteristics on page PU Subject to general operating conditions for Table 25. Reset pin characteristics Symbol ...
Page 42
Electrical parameters Figure 20. NRSTIN R 42/52 vs 250 200 150 100 3.5 4 Vdd (v) 25C -45C 110C 4.5 5 5.5 STR73xFxx ...
Page 43
STR73xFxx 4.3.6 10-bit ADC characteristics Subject to general operating conditions for V Table 26. ADC characteristics Symbol f ADC V Conversion voltage range AIN Negative input leakage current on I lkg analog pins Internal sample and hold C ADC capacitor ...
Page 44
Electrical parameters Table 27. ADC accuracy with f V DDA Symbol |E | Total unadjusted error Offset error Gain error Differential linearity error Integral linearity error L 1. ...
Page 45
STR73xFxx Analog power supply and reference pins The V and V DDA SSA the high and low reference voltages for the conversion. Separation of the digital and analog power pins allow board designers to improve A/D performance. Conversion accuracy can ...
Page 46
Package characteristics 5 Package characteristics 5.1 Package mechanical data Figure 24. 100-pin thin quad flat package Figure 25. 144-pin thin quad flat package 108 109 b 144 1 e 46/ ...
Page 47
STR73xFxx Figure 26. 144-ball low profile fine pitch ball grid array package Figure 27. Recommended PCB design rules (0.80/0.75mm pitch BGA) Dpad Dpad Dsm Solder paste – Non solder mask defined pads are recommended – mils screen ...
Page 48
Package characteristics 5.2 Thermal characteristics The average chip-junction temperature, T following equation Where: – the ambient temperature in °C, A Θ – is the package junction-to-ambient thermal resistance, in °C/W, JA ...
Page 49
... STR730FZ2H7 256 STR735FZ1T7 128 TQFP144 20x20 STR735FZ2T7 256 STR735FZ1H7 128 LFBGA144 10x10 STR735FZ2H7 256 STR731FV0T7 64 TQFP100 STR731FV1T7 128 14x14 STR731FV2T7 256 STR736FV0T7 64 TQFP100 STR736FV1T7 128 14x14 STR736FV2T7 256 TIM 6x PWM CAN RAM Kbytes timers module periph Order codes A/D Wake-up I/O Temp ...
Page 50
Known limitations 7 Known limitations 7.1 Low power wait for interrupt mode When the STR73x device is put in Low Power Wait For Interrupt mode (LPWFI), the Flash goes into low power mode or power down mode, depending on the ...
Page 51
STR73xFxx 8 Revision history Table 30. Document revision history Date 19-Sep-2005 02-Nov-2005 08-Mar-2006 04-Jun-2006 19-Jun-2006 08-Sep-2006 08-Jun-2008 Revision 1 First release Removed Table 8 power consumption in LP modes 2 Updated PLL frequency in Section 3.4: Preliminary power consumption data ...
Page 52
... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...