ST62T25CM6/TR STMicroelectronics, ST62T25CM6/TR Datasheet - Page 34

IC MCU 8BIT W/ADC 28-SOIC

ST62T25CM6/TR

Manufacturer Part Number
ST62T25CM6/TR
Description
IC MCU 8BIT W/ADC 28-SOIC
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T25CM6/TR

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
20
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 16x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
ST6215CM-Auto ST6225CM-Auto
7.2 WAIT MODE
The MCU goes into WAIT mode as soon as the
WAIT instruction is executed. This has the follow-
ing effects:
– Program execution is stopped, the microcontrol-
– RAM contents and peripheral registers are pre-
– The oscillator is kept running to provide a clock
WAIT mode can be used when the user wants to
reduce the MCU power consumption during idle
periods, while not losing track of time or the ability
to monitor external events. WAIT mode places the
MCU in a low power consumption mode by stop-
ping the CPU. The active oscillator (main oscillator
or LFAO) is kept running in order to provide a clock
signal to the peripherals.
If the power consumption has to be further re-
duced, the Low Frequency Auxiliary Oscillator
(LFAO) can be used in place of the main oscillator,
if its operating frequency is lower. If required, the
LFAO must be switched on before entering WAIT
mode.
Exit from Wait mode
The MCU remains in WAIT mode until one of the
following events occurs:
– RESET (Watchdog, LVD or RESET pin)
– A peripheral interrupt (timer, ADC,...),
– An external interrupt (I/O port, NMI)
The Program Counter then branches to the start-
ing address of the interrupt or RESET service rou-
tine. Refer to
See also
34/100
1
ler software can be considered as being in a “fro-
zen” state.
served as long as the power supply voltage is
higher than the RAM retention voltage.
to the peripherals; they are still active.
Section
Figure
7.4.1.
20.
Figure 20. WAIT Mode Flowchart
WAIT INSTRUCTION
N
INTERRUPT
Y
OR SERVICE INTERRUPT
OSCILLATOR
Clock to PERIPHERALS
Clock to CPU
OSCILLATOR
Clock to PERIPHERALS
Clock to CPU
FETCH RESET VECTOR
OSCILLATOR
Clock to PERIPHERALS
Clock to CPU
N
CLOCK CYCLE
RESET
Y
DELAY
2048
Restart
Yes
Yes
Yes
Yes
Yes
On
No
On

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