Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 100
Z32AN00NW200SG
Manufacturer Part Number
Z32AN00NW200SG
Description
IC ARM922T MCU 200MHZ 256-BGA
Manufacturer
Zilog
Series
Encore!® 32r
Datasheet
1.Z32AN00NW200SG.pdf
(196 pages)
Specifications of Z32AN00NW200SG
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
Peripherals
DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
For Use With
269-4713 - KIT DEV ENCORE 32 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
269-4717
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Z32AN Series Data Sheet
10.3.3.1
DS0200-003
31:09
Offset x40h: SC_COMMAND – Smart Card Command
Bits
07
06
05
04
03
02
01
00
Type
RW
RW
RW
RW
RW
RW
RW
RW
RO
Reset
0
0
0
0
0
0
0
0
0
Description
Reserved
ATR Timing Interrupt Disable (ATR_TIM_INT_DIS): When set, disables all ATR
timing and does not generate interrupt from ATR.
Send Clock (SEND_CLK):
states of the controller state machine. The sequence of activation of the Card Signals
(VCC, Clock, IO and reset) must be made with the interface chip (ONSEMI) in parallel
with the IP SIM. Not valid with Main Card.
ATR Timeout Enable (ATR_TO_EN): When set, allows the use of the ATR timing
without being in ATR. This bit is reset by writing 1 to ATR_END.
ATR End (ATR_END): When set, signals the completion of the ATR reception. The bit
is automatically reset when the command has been executed.
Stop Card Clock (STOP_CARD_CK):
issued anytime during the WaitCommand state of the controller.
De-activate Card (DEAC_CARD): When set, starts de-activiation sequence. Can be
issued anytime during the
loaded with the correct value. This bit is reset when the command has been executed.
Note: In the case where the card is removed during the
deactivation sequence is automatically started. Therefore, DEAC_DLY must be loaded
with the correct value prior to a ResetCard command.
Reset Card Command (RST_CARD): When set, issues a cold or warm reset of the
card. This bit is reset when the command has been executed. When issued, a timer is
started to count RST_LEN. In the case of a cold reset, software must ensure the power
is stable before issuing the command. A warm reset is performed when the controller is
in the
Power Card Command (PWR_CARD): When set, the card is powered-on. This bit is
reset when the command has been executed.
WaitCommand
state.
WaitCommand
When set, sends the clock without going through the
When set, card clock is stopped.
state of the controller. DEAC_DLY must be
ResetCard
Controller state, a
Page 87
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