Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 45
Z32AN00NW200SG
Manufacturer Part Number
Z32AN00NW200SG
Description
IC ARM922T MCU 200MHZ 256-BGA
Manufacturer
Zilog
Series
Encore!® 32r
Datasheet
1.Z32AN00NW200SG.pdf
(196 pages)
Specifications of Z32AN00NW200SG
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
Peripherals
DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
For Use With
269-4713 - KIT DEV ENCORE 32 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
269-4717
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Z32AN Series Data Sheet
7.1.3
DS0200-003
The programmable timing of asynchronous page reads are shown below. For page reads, the burst is
continued until the end of the request is reached, or until the page boundary is reached, whichever occurs
first. The example provided here has settings of N
ignored.
Asynchronous Page Read Transactions
Symbol
t
t
RA
t
t
RPA
RH
RS
Table 7-3: Asynchronous Page Read Timing (based on MEMC_TIMN)
Formula
- or -
Figure 7-3: Asynchronous Page Read Timing Diagram
Read Access Time: Same as for single cycle access
Description
Read Cycle Setup Time: Same as for single cycle access
Read Page Access Time: Specifies the number of clocks to wait to sample
read data again for a sequential page read.
Read Cycle Hold Time: Same as for single cycle access
RS
=3, N
RA
=3, N
RPA
=2, N
RH
=1, N
RWI
=0 and READY is
Page 32
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