MC68HC705C8ACFN Freescale Semiconductor, MC68HC705C8ACFN Datasheet - Page 145

IC MCU 4MHZ 8K OTP 44-PLCC

MC68HC705C8ACFN

Manufacturer Part Number
MC68HC705C8ACFN
Description
IC MCU 4MHZ 8K OTP 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8ACFN

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705C8ACFN
Manufacturer:
MOT
Quantity:
5 510
Part Number:
MC68HC705C8ACFN
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC705C8ACFN
Manufacturer:
MOT
Quantity:
1 000
Part Number:
MC68HC705C8ACFN
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC68HC705C8ACFNE
Manufacturer:
FREESCA
Quantity:
1 065
Part Number:
MC68HC705C8ACFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC705C8ACFNE
Manufacturer:
FREESCALE
Quantity:
5 591
Part Number:
MC68HC705C8ACFNE
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC68HC705C8ACFNE
Quantity:
17
Part Number:
MC68HC705C8ACFNE
0
Company:
Part Number:
MC68HC705C8ACFNE
Quantity:
1 329
11.5 Multiple-SPI Systems
MC68HC705C8A — Rev. 3
MOTOROLA
Example:
In a multiple-SPI system, all PD4/SCK pins are connected together, all
PD3/MOSI pins are connected together, and all PD2/MISO pins are
connected together.
Before a transmission, one SPI is configured as master and the rest are
configured as slaves.
master SPI and three slave SPIs.
Figure 11-5
three slave SPIs.
LDA #$1C
STA SPCR
LDA #$4C
STA SPCR
Freescale Semiconductor, Inc.
Figure 11-4. One Master and Three Slaves Block Diagram
For More Information On This Product,
MASTER MCU
Serial Peripheral Interface (SPI)
PD2/MISO
PD3/MOSI
PORT
Go to: www.freescale.com
PD4/SCK
is another block diagram with two master/slave SPIs and
I/O
PD5/SS
; MSTR = 1, CPOL = 1, CPHA = 1,
; SPR1 = SPR0 = 0
; SPI control register
; MSTR = 0, SPE = 1, CPOL = 1, CPHA = 1,
; SPR1 = SPR0 = 0
; SPI control register
2
1
0
Figure 11-4
V
DD
SLAVE MCU 2
is a block diagram showing a single
SLAVE MCU 1
Serial Peripheral Interface (SPI)
SLAVE MCU 0
Multiple-SPI Systems
Technical Data
145

Related parts for MC68HC705C8ACFN