MC68HC705C8ACP Freescale Semiconductor, MC68HC705C8ACP Datasheet - Page 116

• Manufacturer Part Number: MC68HC705C8ACP
• Description: IC MCU 4MHZ 8K OTP 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C8ACP

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 304 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

EPROM/OTPROM (PROM)
9.5 Control Registers
9.5.1 Option Register
Technical Data
116
Address:
This subsection describes the three registers that control memory
configuration, PROM security, and IRQ edge or level sensitivity; port B
pullups; and non-programmable COP enable/disable.
The option register shown in
sensitivity, enable the PROM security, and select the memory
configuration.
RAM0 — Random-Access Memory Control Bit 0
RAM1 — Random-Access Memory Control Bit 1
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
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1 = Maps 32 bytes of RAM into page zero starting at address
0 = Provides 48 bytes of PROM at location $0020–$005F.
1 = Maps 96 bytes of RAM into page one starting at address $0100.
0 = Provides 96 bytes of PROM at location $0100.
*
Implemented as an EPROM cell
$1FDF
RAM0
Bit 7
$0030. Addresses from $0020 to $002F are reserved. This bit
can be read or written at any time, allowing memory
configuration to be changed during program execution.
This bit can be read or written at any time, allowing memory
configuration to be changed during program execution.
0
EPROM/OTPROM (PROM)
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= Unimplemented
Figure 9-4. Option Register (Option)
RAM1
6
0
5
0
0
Figure 9-4
4
0
0
U = Unaffected
is used to select the IRQ
SEC
3
*
*
MC68HC705C8A — Rev. 3
U
2
IRQ
1
1
MOTOROLA
Bit 0
0
0