MC68HC705C8ACP Freescale Semiconductor, MC68HC705C8ACP Datasheet - Page 96

IC MCU 4MHZ 8K OTP 40-DIP

MC68HC705C8ACP

Manufacturer Part Number
MC68HC705C8ACP
Description
IC MCU 4MHZ 8K OTP 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8ACP

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705C8ACP
Manufacturer:
MOTOROLA
Quantity:
13
Part Number:
MC68HC705C8ACP
Manufacturer:
FREESCALE
Quantity:
1 487
Part Number:
MC68HC705C8ACPE
Manufacturer:
ON
Quantity:
1 000
Capture/Compare Timer
8.4.2 Timer Status Register
Technical Data
96
Address:
The timer status register (TSR) is a read-only register shown in
Figure 8-6
ICF — Input Capture Flag
OCF — Output Compare Flag
Reset:
Read:
Write:
The ICF bit is set automatically when an edge of the selected polarity
occurs on the TCAP pin. Clear the ICF bit by reading the timer status
register with ICF set and then reading the low byte ($0015) of the
input capture registers. Reset has no effect on ICF.
The OCF bit is set automatically when the value of the timer registers
matches the contents of the output compare registers. Clear the OCF
bit by reading the timer status register with OCF set and then reading
the low byte ($0017) of the output compare registers. Reset has no
effect on OCF.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Input capture
0 = No input capture
1 = Output compare
0 = No output compare
An active signal on the TCAP pin, transferring the contents of the
timer registers to the input capture registers
A match between the 16-bit counter and the output compare
registers, transferring the OLVL bit to the TCMP pin
A timer rollover from $FFFF to $0000
$0013
Bit 7
ICF
U
contains flags for these events:
Go to: www.freescale.com
Figure 8-6. Timer Status Register (TSR)
Capture/Compare Timer
= Unimplemented
OCF
U
6
TOF
U
5
U = Unaffected
4
0
0
3
0
0
MC68HC705C8A — Rev. 3
2
0
0
1
0
0
MOTOROLA
Bit 0
0
0

Related parts for MC68HC705C8ACP